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2022-09-24 23:16:53
NCP5201-Dual Output DDR Power Controller
Description The NCP5201 dual DDR power controller is designed as a total power solution designed for high current DDR memory systems. The IC combines the efficiency of a PWM controller with a linear regulator for the VDDQ voltage for a simple VTT memory termination voltage. The secondary regulator (VTT) is designed to automatically track half of the primary regulator (VDDQ). An internal power good voltage monitor tracks both the VDDQ and VTT outputs and notifies the user of one of the outputs in the event of a fault. Protection features include soft-start circuitry and under-voltage monitoring for VCC and VSTBY. The IC is packaged in a 5 x 6 QFN-18.
Features • Equipped with VDDQ, VTT regulator • Internal switching regulator for VDDQ on standby • All external power MOSFETs are N-channel • Adjustable VDDQ • VTT tracks are VDDQ /2
• Normal mode with fixed switching frequency of 250 kHz provides VDDQ
• Double the switching standby mode frequency (500 kHz)
• Soft-start protection provided by VDDQ
• Undervoltage monitor • Short circuit protection available on both VDDQ and VTT outputs • Set up in a 5 x 6, space saving QFN-18
Typical Applications • DDR Termination Voltage • Active Termination Tour Bus (SSTL Corporation - 2, Surrey Satellite Technology Ltd - 3)