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2022-09-24 23:24:28
FN4871-Multi-Linear Power Controller with ACPI Control Interface
The HIP6502B complements either an HIP6020 or the HIP6021 in ACPI compatible microprocessor designs and computer applications. The IC integrates four linear controller/regulator, switching, monitoring and control functions into a 20-pin SOIC package. A linear controller generates voltage from the 5VSB output of the ATX 3.3VDUAL/3.3VSB aircraft power supply, powering the PCI slot state (S3, S4/S5) of the south bridge through external transistors in sleep. The second transistor is used to switch the operating state of S0 and S1/S2 (active) during operation of the ATX 3.3V output. Two linear controllers/regulators are selected to supply one or both of the 2.5V or 3.3V power supplies of the computer system to pass transistors in the active state through external memory. In the sleep state, the sleep capability is integrated through the transistor power supply. The other controller has 5VDUAL aircraft power, the ATX 5V switch output is active, and the ATX 5VSB is in sleep state. An internal regulator outputs a dedicated, noise-free 2.5V clock chip supply. The operating mode of the HIP6502B (active output or sleep output) is selectable through two digital control pins, S3 and S5. The enabled sleep state is supported by the 5VDUAL output provided via the EN5VDL pin. In the active state, the 3.3VDUAL and 3.3VMEM linear regulators use external N-channel MOSFETs to connect the output directly to the 3.3V input powered by ATX (or equivalent) with minimal losses. In the sleep state, power is transferred to the NPN transistors at two outputs - 3.3VDUAL on the external and 3.3VMEM on the internal controller. Active state regulation at 2.5VMEM output is implemented by an external NPN transistor. In the sleep state, the output conduction is transferred to the internal pass transistor. The 5VDUAL is powered by two external MOS transistors for the output. In the sleep state, a PMOS (or PNP) transistor carries the output current from the ATX 5VSB; while in the active state, the current is diverted to the NMOS transistor connected to the ATX 5V output. Operation on the 5VDUAL output is governed not only by the dominant position of the S3 and S5 pins, but also by the EN5VDL pin. The 3.3VDUAL/3.3VSB output is active as long as the ATX 5VSB voltage is applied to the chip. The 2.5VCLK output is only active, S0 and S1/S2, and uses the 3V3 pin input source as the internal transfer element.