Features

H bridge motor driver

- A winding or other load of driving DC motor, step motor

- Low MOSFET drive resistance resistance : 65 mΩHS+LS, 4.2V, 25 ° C

5-A consecutive peak driving current

]

2 to 5.5-V working power supply voltage range

overvoltage and lack of voltage lock

low power sleep mode [123 ]

100 MA isolation low voltage difference (LDO) voltage regulator

24 -pin vqfn packaging

Battery power application with high start -torque, for example:

- Personal hygiene (electric toothbrush, shaving knife)

- Toys

–RC helicopter and car

- Robotics

Instructions

DRV8850

Equipment provides motor drivers with motion control applications for consumer goods, toys and other low -voltage or battery power supply. Instrument solution. The device has an H bridge driver to drive DC motors, audio actuators, a winding, snail tube or other equipment for step motor. The output drive module consists of the N -channel power MOSFET and is configured to the HBRIDGE driver load. The internal charge pump generates the required grid drive voltage.

DRV8850 devices provide continuous output current (proper PCB heat dissipation) of up to 5 amp (appropriate PCB heat dissipation) and the peak current of up to 8 amp. Its operating voltage from 2 to 5.5 volts.

Low -voltage differential linear voltage regulator and motor driver integration to power the microcontroller or other circuits. The LDO regulator can be activated in the dormant mode of the device, so that the drive can be turned off without cutting off the power supply of any device supply by the LDO voltage regulator.

The internal shutdown function provides over -current, short -circuit, under pressure, overvoltage and overheating protection. In addition, the device also has a built -in current sensing to achieve accurate current measurement.

The DRV8850 equipment uses 24-pin VQFN (3.5-mm × 5.5-mm) packaging (environmental protection: ROHS and SB/BR).

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

Simplify the schematic diagram

Typical features

Detailed description Overview [ 123] DRV8850 is an integrated motor solution for DC motor. The device integrates a NMOS HBRIDGE, current adjustment circuit and various protection circuits. The power supply range of DR8850 is 2V to 5.5V, and the output current with up to 5A peak current can be provided. The actual operating peak current will depend on temperature, power voltage, and PCB ground plane size. Between VM 1.95 V and VM 2 V, the H bridge output is closed.

A simple 4 -pin interface allows each internal H bridge effect transistor to control separately. HS and LS FET are not allowed at the same time. Both HS and LS FET are closed under this input conditions.

The current monitoring can be configured within the range of 500 mAh to 5. The analog current output by VPROPI pins is proportional to the current flowing through the H bridge. VPROPI originated from the current of any high -sided FET. Therefore, when running at a fast attenuation mode or low -side slow attenuation mode, VPROPI does not represent the H bridge current.

LDO regulator integrated in DRV8850 is usually used to provide a power supply voltage for low power micro -controllers. With an external resistor, the output voltage can be adjusted from 1.6 V to VCC -vldo. The LDOEN pin is used to enable or disable the LDO regulator; when disabled, the output is turned off, and the LDO regulator enters a very low power state.

Figure Figure

Feature description

Table 1 lists external components.

Power Director

LDO regulator can be activated on the NSLEEP pin. This independence allows micro -controllers or other devices to be powered by the LDO voltage regulator, while maintaining the ability of the DRV8850 device to enter the sleep mode.

Due to this function, both NSLEEP and LDOEN must reduce logic and consume the power in the minimum sleep mode. If the LDO regulator maintains activation under the dormant mode, the static current of IVCQ2 will be extracted from the power supply (usually 50 μA and the current of the external feedback resistor).

Table 2 lists the operating mode logic of the DRV8850 device.

Bridge control

The corresponding input pins control control the single FET in the DRV8850 device. Directly (HS and LS FET are opened at the same time); under this input conditions, HS and LS F are under this input conditionsET will be closed.

Table 3 lists the logic of the DRV8850 device.

current -VPROPI

VPROPI pins output an analog current proportional to the current in the H bridge. The output current is often 1/2000 of the two high -side FET currents. VPROPI originated from the current of any high -sided FET. Therefore, when running at a fast attenuation mode or low -side slow attenuation mode, VPROPI does not represent the H bridge current. VPROPI represents the H bridge current under forward driver, reverse drive and slow attenuation of high -voltage side attenuation. After the high -side effect transistor is turned on, the VPROPI output delay is about 2 μs and reaches about VCC (including silicon removing on HSON). Choose an external resistor to make the voltage on VPROPI less than (VCC – 1 V), so the size of the resistor must be smaller than:

where iOUT is the biggest driving current to be monitored ;

Assuming that the external resistance meets the Archae 1, the current range of the monitoring is 500 mA to 5 A.

When using an independent semi -bridge as a high -voltage side drive, VPROPI does not output the current measurement value during the slow attenuation period. During the typical operation, VPROPI indicates the total current that flows to the load connecting to OUT1 and OUT2.

VPROPI does not work when it is implemented as a low -end driver.

Return rate control

The rise and decrease time of the output (TR and TF) of the output can be connected from SR pins to the outer resistor of the ground from SR pins to the ground. Let's adjust. The output conversion rate is adjusted by the slope rate of the DRV8850 device by controlling the driving field effect of the transistor grille.

The typical voltage on the SR pin is 0.6 V internal driver. Change the resistance value monotonous to increase the conversion rate from about 100 ns to 100 μs. The value of the external resistor is recommended from GND to 2.4 m . If the SR pin is grounded, the conversion rate is 100 nan seconds.

Dead zone time

The dead area time (TDEAD) refers to the time when the OUTX is in Hi-Z when turning off a H bridge FET and opening another FET. For example, between the high-edge field effect transistor and the low-edge field effect transistor, the output is HI-Z. When the driving current leaves the pin, observes the output dropped to a diode and dropped below the ground. When the driving current enters the pins, you can observe a diode voltage drop that rises to VCC.

DRV8850's simulation dead area time is about 100 nan seconds. In addition to simulating the dead area, when the FET gate voltage is less than the thresholdWhen the voltage is voltage, the output is Hi-Z. The total dead area time depends on the SR resistance settings, because part of the FET gate slope includes an observed dead zone time.

Display delay

The time between the transmission delay (tdlay) is measured between the input edge and output changes. This time consists of two parts: input the ice removal and output return delay. The input dehogenesis prevent the noise on the input pin from affecting the output state.

The output conversion rate also helps delay time. In order to change the output during the typical operation period, a FET must be closed first. According to the selection of the SR resistance, the fET gate is tilted downward. When the FET gate drops below the threshold voltage, the transmission delay is over.

Power and input pin

The voltage generated by the internal charge pump is greater than the VCC used to drive the internal N channel power MOSFET. The charge pump needs a capacitor between the VCP and VCC pin. TIs are recommended to bypass VCC ground with 0.1-μF and 10-μF ceramic capacitors to get as close to IC as much as possible. Each input pin has a weak drop resistance (more detailed information, please refer to the electrical characteristics).

Without removing the VCC power, the voltage of the input pin should not exceed 0.6 V.

LDO pressure regulator

LDO regulator is integrated in the DRV8850 device. LDO regulator is usually used to provide power voltage for low -power micro -controllers. To work normally, using ceramic capacitors to warves the LDOUT foot to GND. The recommended value of this ingredient is 2.2 μF.

Two external resistors set the LDO voltage (VLDO) by creating a separator between LDOOUT and LDOFB. The LDO output voltage can be concluded by the following formulas:

Among them:

R1 is between LDOOUT and LDOFB

u0026 u0026 #8226; R2 between LDOB and GND

The external resistor can be used, the output voltage can be adjusted from 1.6 V to VCC -VLDO. The LDOEN pin is used to enable or disable the LDO regulator; when disabled, the output is turned off, and the LDO regulator enters the low power state.

When the LDO current load exceeds ICL, the behavior of the LDO regulator is similar to the constant current source. When the current is greater than ICL, the LDO output voltage drops significantly.

Protective circuit

DRV8850 equipment has the protection of anti -pressure, overvoltage, overcurrent and overheating events.

Overcurrent protection (OCP)

The analog current limit circuit on each FET is limited to the current of the FET by removing the gate driver. If the simulation current limits the duration of TOCP, all FETs in the H bridge will be disabled. After about a distance, the bridge is automatically enabled.

Overcurrent situations on high -voltage and low -voltage side devices, that is, short -circuit, short -circuit of power supply, or short circuit of motor winding, can cause overcurrent stops.

Hot shutdown (TSD)

If the mold temperature exceeds TTSD, all FETs in the H bridge will be disabled. Once the mold temperature drops below TTSD -THYS, the H bridge will be automatically enabled.

IOU locking (UVLO)

If the voltage on the VCC pin is reduced to lower than the voltage of the underwriter lock at any time, all circuits in the device will be disabled, the internal logic will be disabled, and the internal logic will be Rebate. When VCC rises to the UVLO threshold, the operation recovers.

Oremial lock (OVLO)

If the voltage on the VCC pin rises above VOVLO at any time, the output FET will be disabled (output to high Z). When VCC is lower than VOVLO, the operation is restored.

Pay attention to security

VCC must maintain the absolute maximum rated value below the device, otherwise the device may be damaged.

Device function mode

DRV8850 internal logic and charge pumps are running, unless NSLEEP is pulled down. The LDO regulator can be activated on the NSLEEP pin. This independence allows micro -controllers or other devices to be powered by the LDO regulator, while maintaining the ability to put DRV8850 in the dormant mode.

If the logic of LDOEN and NSLEEP is very low, the device will minimize the current in the sleep mode. When the LDO regulator maintains the activation state in the dormant mode, the static current will be extracted from the power supply (usually 50 μA plus the current with an external feedback resistor).

Each FET in the device is controlled by the corresponding input pins on the DRV8850. HS and LS FET are not allowed at the same time. Both HS and LS FET are closed under this input conditions.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

DRV8850 can be used to drive DC motors.

Typical application

Design requirements

Table 4The parameters of the design example are released.

Detailed design program

motor voltage

The motor voltage used depends on the rated value of the selected motor and the required speed. The higher voltage makes the rotation speed of the brushing motor faster, and the same pulse width modulation duty cycle is applied to the power field effect transistor. The higher voltage will also increase the current changes in the current through the inductive motor winding.

Drive current

The current path is through the high -side source DMOS power drive, motor winding, and low -side sinking DMOS power drive. The power consumption loss in the source of the DMOS power drive is shown in the following formula.

On the standard FR-4 PCB, the current measurement value of DRV8850 at 25 ° C is 5-a. The maximum square -rooted current varies depending on the design of PCB and the environmental temperature.

Application curve

Power suggestion

Body capacitance

A suitable local volume capacitance is the design of the motor drive system design An important factor. Generally speaking, more volume capacitors are beneficial, but the disadvantage is increased cost and physical dimensions.

The required local power capacity depends on multiple factors, including:

the highest current required for the motor system.

capacitance and ability to provide current.

Parasitic inductance between the power supply and the motor system.

acceptable voltage ripples.

the type of motor (brush, brushless DC, step motor).

motor braking method.

The inductance between the power supply and the motor drive system will limit the change rate of power current. If the local large -capacity capacitance is too small, the system will respond to excessive current requirements, or uninstall from the motor as the voltage changes. When using sufficient large -capacity capacitors, the motor voltage remains stable and can quickly provide large current.

The data table usually provides a recommended value, but it is necessary to perform system -level tests to determine large -capacity capacitors with appropriate size.

The rated voltage of a large -capacity capacitor should be higher than the operating voltage, so that it can provide a lot of time when the motor transmits energy to the power supply.

Layout

Layout Guide

Placement of large -capacity capacitors should be reduced as much as possible to drive the distance through the motor drive device. The width of the metal trace line should be as wide as possible, and multiple excess perforated should be used when connecting the PCB layer. TheseMethod to minimize the inductance and allow large -capacity capacitors to transport high current.

small value capacitors should be ceramics, and placed in a position near the device pin.

High current equipment output shall use wide metal trace lines.

Equipment hot pad should be welded on the floor floor of the PCB. Multiple pores should be used to connect to large bottom ground planes. Use large metal planes and multiple holes to help the I2 × RDS (ON) heat generated in the dissipation device.

layout example

Heat Precautions

DRV8850 device has the heat shutdown (TSD) described by the heat shutdown (TSD) part. If the mold temperature exceeds about TTSD, the device will be disabled until the temperature drops to the safe level.

Any trend of the device's entry into the heat stack indicates that the power consumption is too large, insufficient heat dissipation, or the environmental temperature is too high.

Power consumption

The power consumption of the DRV8850 device is the sum of the power consumption of the motor and the power consumption of the LDO regulator.

LDO scattering can be simply calculated by × iOut.

The power consumption in the motor drive is controlled by the output FET resistance (ON) consumption. The power consumption can be estimated by the following ways:

Among them:

PTOT is the total power consumption

RDS (on) is the resistance of each fet

iOut (RMS (RMS ) It is the driven RMS output current

The maximum power consumed in the device depends on the ambient temperature and heat dissipation.

Note that the RDS (on) increases as the temperature increases, and the temperature increases. Therefore, when the device is heated, the power consumption will increase.