L6599A improved hi...

  • 2022-09-16 16:00:09

L6599A improved high -voltage resonance controller

Features

50%duty ratio, variable frequency control

Resonance semi -bridge

High -precision oscillator

The operating frequency is as high as 500 kHz [123 ]

Two -level OCP: Frequency shift and lock

Turn off

The interface of the PFC controller

The lock -up disable input

Lightly negative load under the load of light load Urban mode operation

Power opening/off sequential input or

Power off protection

Non -linear soft start of monotonous output

voltage increase

600 V-shaped rail compatible high-voltage side gate drive

Integrated self-lifting diode and high DV/DT

Immune

-300/800 mA high and low voltage side gate [ 123]

Drivers with UVLO drop -down function

DIP16, SO16N packaging

Application

LCD and PDP TV

desktop PC, entry -level level level Server

Telecom SMPS

High -efficiency industrial switch power supply

Interchange DC adapter, open switch power supply

Explanation

L6599A

is an improved version of the previous L6599. It is a dual -end controller particularly in the semi -bridge topology of the series. It provides a 50%supplemental ratio: high -voltage side switch and low -voltage side switch are driven by the 180 ° heterogeneous phase at the same time. The output voltage regulation is the frequency of the operation through the adjustment operation. Insert a fixed dead zone time between a switch and the opening switch, another guarantee soft switch, and achieve high -frequency operation. In order to drive the high -voltage side switch by self -lifting method, the integrated circuit contains a high -voltage floating structure that can withstand a synchronous driver with a synchronous driver of more than 600 volts. The integrated circuit enables the designer to set the operating frequency range of the converter in the following way. When starting, in order to prevent uncontrolled influx current, the switching frequency is from programming maximum values and gradually attenuated until the value determined by the control circuit is reached until the stable state. This frequency offset is non -linear and is super -adjusted by minimizing the output voltage; its duration is also programmable. Under the light load, the integrated circuit can enter the controlling emergencies to minimize the converter's investment consumption. Integrated circuit functions include a non -lock -lock -owned low -active disable input, and its current stagnation can be used for power sorting or power -limiting protection. OCP current current input, frequency conversion and delay stop, automatically restart. A higher -level OCP lock IC IF first -level protection is not enough to control the current. Their combination provides comprehensiveOverload and short -circuit protection. Additional locking forbidden input (DIS) can easily achieve OTP and/or OVP. The interface with the PFC controller is provided to enable the pre -regulator to operate in the case of failure, such as OCP shutdown and high DIS, or turn off the mode operation under emergencies.

Electric characteristics

TJ 0 to 105 ° C, VCC 15 V, vBoot 15 v, chvg clvg 1 nf; cf 470 PF; rrfmin 12 kΩ; unless there are other regulations. table 5. Electrical characteristics

Table 5. Electrical characteristics (continued)

Typical electrical performance

Application information

L6599A is an advanced dual -end controller, which is specially used for resonance half -bridge topology (see Figure 21). Among these converters, the time of the half -bridge -legged switch (MOSFET) alternately opened and closed (180 ° different phase) exactly the same. This is usually called the 50%duty ratio operation. Although the actual occupation ratio, that is, the ratio of the connection time of any switch to the switch cycle is actually less than 50%. The reason for inserting a closing time internally is the fixed MOSFET and another MOSFET. Both MOSFETs are closed. In order to make the converter work normally, the dead area time is indispensable: it ensures that the soft switching high -frequency operation of high -efficiency and low electromagnetic interference is ensured. In order to adjust the output voltage of the converter, the device can be in different modes (Figure 20), depending on the load conditions:

1. The frequency conversion under heavy and medium/light load. Relax oscillator (see Section 7.1: oscillator (more detailed information) generates symmetrical triangular waveforms, where is the MOSFET switch locked in. The bridge is stimulated at a frequency by the feedback loop to maintain the output voltage adjustment, so the characteristics of the frequency dependent transmission are used.

2. There is no load or a very light load. When a certain value, the inverter enters the control intermittently. In this case, a series of several series of switching campaigns are separated by the long leisure cycle under the long -fixed frequency, where the MOSFET is closed. For a longer idle, the frequency of the average switch is reduced. When the converter is fully loaded, the average switching frequency can even be reduced to rarely. To maximize the magnetization current loss and loss related to the frequency, it is easier to meet it. Suggestions of energy -saving requirements.

oscillator

The oscillator performs external programming through a capacitor (CF). The capacitor is connected from the pin 3 of the pins (CF) to the ground, and connected to the pin 4 (RFMIN) through the network. The accurate 2 -volt voltage of 2 mAh power and the higher the current provided by the pins, the higher the current, the frequency of the oscillator is. The box diagram of FIG. 22 shows a simplified internal circuit interpretation operation. The network that loads the RFMIN tube foot is usually composed of three branches: 1 The resistance RFMIN connected between the pins and the ground is used to determine the minimum value operating frequency. 2. A resistor RFMAX connected between pins and (transmitting polar ground) photovoltaic transistor collection electrodes, which is used to return to the primary side from the secondary side transmission feedback signal; at work, the optical transistor regulating current passes through this branch- Therefore, the frequency of the modulation oscillator-to perform the output voltage adjustment; the value of the RFMAX determines the half of the bridge of the maximum frequency when the photoelectric crystal is fully saturated. 3. A R-C series circuit (CSS+RSS), which is connected between the pins and grounding and sets frequency movement (see Section 7.3: Soft Start). Note that the contribution of this branch is zero during the steady -state operation.

The similar relationship below is applicable to the minimum and maximum oscillator frequency:

Fix CF in 100 PF or NF (consistent with the maximum source as the maximum source The ability of the RFMIN pin and weigh the total consumption of the device, select the value of RFmin and RFMAX, so that the frequency of the oscillator can cover the entire range required to adjust, from the minimum value FMIN (minimum input voltage and maximum load) To the maximum value FMAX (in the maximum input voltage and minimum load):

In the case of running without load, (See Section 7.2: Operations under the air load or very light load).

In FIG. 23, the timing relationship signal between the oscillator waveform and the gate driver And the swing node of the half -bridge leg (HB) display. Note that when the triangle of the oscillator rises, the low side grid drives opens, and the high side gate driver is opened when the triangle is tilted down. Or as an integrated circuit restore the switch during the operation period, the low -voltage side MOSFET first connects to charge the self -lifting capacitor. Therefore, the guidance belt is always ready to provide high -voltage side floating drives.

empty load Or ultra -light load operation

When the resonant semi -bridge is light or empty, its switching frequency is to maximize the value. Keep the output voltage control under these conditions. The magnetization inductance of the remaining current flow over the transformer. However, this current generates some related loss values that prevent the air load from the short load of the inverter. In order to overcome this problem, L6599A, L6599AThe designer enables the converter to work intermittently (emergencies operation). A series of switching weeks intervals and two MOSFETs are in the long air leisure period of the shutdown state, so the average switching frequency can be greatly reduced. Therefore, the average value of the residual is therefore greatly reduced the magnetization current and related losses to make the converter meet the energy -saving suggestions. L6599A can run by using a pin 5 (STBY) in the emergency mode: if the pin falls below 1.24 volt, the integrated circuit enters the idle state, and the two gate drivers are very low, the oscillars stop, soft startup The capacitor CSS keeps its charge, and only the benchmark of 2VRFmin pins maintains its activity status, and is discharged from the minimized IC consumption and VCC capacitors. When the voltage on the pin exceeds 1.24 V multiplied by 50, the IC returns to the normal working millivolt. To achieve an emergency mode operation, the voltage associated by the spare pins should be applied to the feedback circuit. Figure 24 (a) shows the simplest implementation, suitable for narrow input voltage range (for example, when there is a PFC front end).

Basically, RFMAX defines the switch frequency FMAX burst mode operation of L6599A. After fixed FMAX, you can find RFMAX from the relationship:

Note that it is different from the FMAX considers in the previous section ( Section 7.1: oscillator ). Here Related to a load Poutb greater than the minimum value. POUTB is the low -current current of the transformer, which does not produce listening noise. However, the switching frequency of the resonant converter also depends on the input voltage; therefore, the value of Poutb will change greatly under the situation where the input voltage range of the circuit shown in FIG. 24A will change greatly. In this case, it is recommended to use the arrangement as shown in Figure 24B, where the information about the input voltage of the converter plus the voltage applied to the spare pin. Because a strong non -linear relationship is between the switching frequency and input voltage, the relationship between the switch frequency and the input voltage with experience methods requires more actual correction RA/(RA+RB) Variety. The manufacturing must choose the total value RA+RB is greater than the RC to minimize the voltage of the line pins (see Section 7.6: the line sensor function). No matter which circuit is used, the operation can be described as follows. When the load drops to the POUTB frequency, the voltage on the maximum programming value FMAX and the spare pins (VSTBY) is lower than 1.24 V. Then, the IC stopped, and the two gate drivers were very low, so the two MOSFETs of the half -bridge legs were disconnected. The VSTBY is now increased due to the feedback response to the energy transmission stop, and it is more than 1.29 V, and the IC has restarted the switch. After a while, VSTBY responded to the energy explosion and stopped IC. In this way, the converter is almost constant in a sudden way. Then further reduce the loadThe frequency is reduced, and it can even be reduced to hundreds of Hertz. The chart 25 of the timing chart 25 shows this operation and shows the most important signal. Small capacitors (usually 100 PF) from spare pins to the ground are placed as close as possible to the IC as much as possible to minimize the switching noise, which helps to obtain cleaning operations. Even if the power factor correction can help the designer meet the energy conservation requirements. In the system, the PFC pre-adjustator first plays the DC-DC converter first. L6599A allows this PFC pre-adjuster to turn off during the emergency mode operation, so The empty load consumption (0.5 1W) at this stage was eliminated. This does not have compliance issues, because the EMC regulations on low -frequency harmonic emission refer to the rated load, so when the converter runs under light or empty load, the restrictions should be considered. To this end, L6599A provides pins 9 (PFC U STOP): Usually it is the opening of the road set output. When the IC is idle during the emergency mode operation, it is asserted to be low. This signal is used to turn off the PFC controller and a pre -regulator, as shown in Figure 26. When L6599A is in UVLO, the pins are kept open so that the PFC controller starts

Soft start

Generally speaking, the purpose of soft start is to gradually gradually start Increase the ability to start the flow of the current to avoid excessive surge. The output power and frequency of the resonance converter are inverse proportional, and the soft start is swept from the initial high value to the control loop to take over. Using the L6599A inverter, you only need to add a R-C series to achieve a circuit from the needle 4 (RFMIN) to the ground (see Figure 27, the left side). Initially, the capacitor CSS was completely discharged, so the series resistor RSS was effective in parallel with RFMIN. The initial frequency generated by RSS and RFMIN was determined. However, because the optocoupler optical transistor was cut off (as long as the output voltage was not far from the specified value):

The CSS capacitor is gradually charged until its voltage reaches the reference voltage (2 V), so the current of the RSS is zero. This is usually applied 5 times by selecting the constant RSS · CSS. The output voltage should be close to the specified value before the CSS reaches 2V. After the feedback circuit is close to the connection, the operating frequency of the optoelectronic transistor determines the operating frequency of the photoelectric transistor starts from that moment. In the frequency scanning phase, the operating frequency will be charged with the CSS index, that is, at first it changes faster, but the rate of change becomes slower and slower. This offsets the non -linear frequency dependencies of the tank that resonates with a small circuit with a small frequency of the converter's power capacity. When the frequency is close to the resonance frequency, it changes very quickly (see Figure 27, right)

[ 123] Therefore, the average input current increased steadily without peak linear frequency sweeping, and the output voltage almost reached the specified value and did not overwhelm it.

Usually,RSS and CSS are based on the following relationship: Format 5

It is recommended to be at least 4 times in FSTART. CSS's suggestion standards are quite experienced, and are effective soft startup operations and effective OCP (see the next section). Please refer to the timing diagram of FIG. 27 to view the valid signal of the soft start -up phase.

current influenza response, OCP and OLP

Resonant half -bridge is essentially voltage mode control; therefore, current fluid measurement input is only used as over -current protection (OCP). Unlike the converter controlled by PWM, the energy flow of the latter is switched by the main switch (or switch). In the resonant semi -bridge, the duty cycle is fixed, and the energy flow is controlled by the switch frequency. This will affect the way of current limit. In the converter controlled by PWM, the energy flow can simply terminate the switching threshold in advance through the current to the preset value by the emission to the preset value. That is to say, the frequency of its oscillator must increase, and this cannot be as fast as the turnover switch: at least the next oscillator cycle is required to see the frequency change. This means that when an effective increase can change the energy flow significantly, the frequency change rate must be slower than the frequency itself. This means that the cycle limit is not feasible. Therefore, a current information input to the current input end of the current must be average in some ways. Of course, the average time should not be too long to prevent one current from avoiding excessive values. In FIG. 28, several current sensing methods are explained. The circuit in Figure 28A is relatively simple, but the loss on the sensing resistance RS may not be ignored, damage efficiency; the circuit of FIG. 28B is more complicated, but it is almost non -damaged. It is recommended to use it when the efficiency target is very high.

L6599A is equipped with current input (pin 6, Isen) and over -current management system. Isen pins connect to the first input comparator in the input end, refer to 0.8 V, and the comparator of the second comparator refers to 1.5 V. If the external voltage applied by any circuit in FIG. 28 exceeds 0.8 V, the first opening switch will trigger the internal discharge soft startup capacitor CSS (see Section 7.3: Soft Start). This quickly increased the oscillator to limit the transmission of energy. The discharge continues until the Isen pin decreases by 50 millivolves; the average time is within the range of 10/fmin, which can ensure that the effective frequency increases. In the case of short -circuited output, this operation will lead to a constant peak current. The voltage on the Isen pin may exceed 0.8 V. It is normal; however, if the voltage on the Isen pin reaches 1.5V, it triggers the second comparator, that is, the L6599A will Turn off and lock, so turn off the entire device. The power supply voltage of IC must be lower than the UVLO threshold, and then it can be restarted higher than the start level. If such an incident is too large to start the capacitor CSS too large, so that the discharge speed is notFast enough, this situation may occur or the rectifier is under the condition of the transformer's magnetized inductor saturation or the short circuit of the second winding. In the circuit shown in FIG. 28A, a sensing resistor is connected to the use of low -side MOSFETs, pay attention to the special connection of resonant capacitors. In addition to the time required to pass the voltage of the RS and flow over the high -voltage side MOSFET, most of the switching cycles are positive low -side MOSFETs that are turned off. Assuming that the constant of the RC filter is at least the approximate value of the 10x RS of the minimum switch frequency FMIN can be obtained through the experience formula:

Among them, ICRPKX is the largest of the resonant capacitor flowing through the resonant capacitor It is expected to have a peak current and a winding of the transformer, which is the maximum load and the minimum input voltage.

The circuit shown in FIG. 28B can be operated in two different ways. If the resistor RA in series to CA is small (not more than 100Ω, just to limit the current peak), its working principle is similar to capacitive current pressure division; CA is usually equal to or less than CR/100, and it is a low -loss type. The selection of sensing resistance RB is as follows:

CB means that RB · CB is within the range of 10/fmin. If the resistance RA connected to the CA is not small (in this case, 10 kΩ is usually selected), the working method of this circuit is similar to the signs of the resonated capacitor CR upper ripple voltage, which is the current with the current with CR electricity resistance. The choice is equivalent to CR/100 or lower. This time it is not necessarily a low -loss type, and RB (premise is u0026 lt; u0026 lt; RA). Based on:

) The electric resistance shall calculate ICRPK ICRPKX at the following frequency. Similarly, CB is like this, RB · CB is within the range of 10/fmin. Regardless of which circuit is used, the calculation value of RS or RB should be regarded as the cutting value that needs to be adjusted after the first experimental verification. In this case, the output current through the second winding and the rectifier of the output current can endanger the safe flow of the variable device if continuously. In order to prevent any damage in these cases, the intermittent operation of the inverter should usually be forced to make the average output current reaches the thermal stress of such a transformer and rectifier. Using L6599A, designers can allow overload or short circuit running at the maximum external programming TSH inverter. The overload or short circuit that lasts less than TSH will not lead to any other actions, so the system is immune to short -time phenomena. If it exceeds TSH, the overload activation protection (OLP) program is turned off to turn off the L6599A, and the overload/short circuit continues, resulting in continuous intermittent intermittently at the user definition of the duty cycle.

This function realizes the resistance through the capacitor CDlay and the parallel circuit (delay)The device R is grounded. When the voltage on the Isen pin exceeds 0.8 V, the OCP comparator, in addition to discharging the CSS, open an internal current generator to lead to 150 μA power supply from a delayed tube and charge CDlay. When overload/short circuit, the OCP comparator and internal current source are repeatedly activated. CDlay is basically the characteristics of the average current charging CSS sensor filter circuit and resonant circuit that basically depends on the current constant of the current. It's longer.

This operation lasted until the voltage on CDlay reached 2V, which defined TSH. There is no simple relationship between TSH and CDlay, so CDLAY is determined by experimental method. As a rough instruction, when CDLAY 1 μF, TSH is in a 100 millisecond command. Once CDlay is charged under 2V voltage, the internal switch of the CSS discharge will be forced to output by the OCP comparator, and the 150 μA current source is continuously connected until the voltage on the CDlay reaches 3.5 V. This phase continues:

TMP is represented by MS, and CDlay is represented by μF. During this period, L6599A runs close to FSTART at a certain frequency (see Section 7.3: Soft start) to minimize energy in the resonant circuit. When the voltage on the CDlay is 3.5 V, the L6599A stops the switch, and the PFC U stops the pins. At the same time, the internal generator is also closed, so that CDlay is now slowly discharged by RDlay. When the voltage on CDlay is lower than 0.3 V, the IC is restarted. This requires:

The timing diagram in FIG. 29 shows this operation. Note that if the voltage of the L6599A (VCC) during the TSTOP period is lower than the UVLO threshold, the IC record event and if V (delay) still exist, the VCC will not immediately restart the higher than 0.3 V. As long as V (latency) is greater than 0.3 V, the PFC U stop pin will remain at a low level of 0.3 V. It should also be noted that if the overload duration is less than TSH, the value of TSH will be low in the next overload if they approach each other.

Holding Dispay

L6599A is equipped with a comparator, with external non -turquate inputs can be used at the pin 8 (DIS), and reference in internal reference 1.85 V. The voltage exceeds the internal threshold, the IC is closed immediately, and its consumption is reduced to a low value. The information is locked, and it is necessary to make the voltage on the VCC pin below the UVLO threshold to reset the lock and restart the IC. This function can easily realize the atresia overheated overheating protection in the following ways to deviate from the external reference voltage (such as pin 4, RFMIN). The upper resistance is a NTC, which is physically close to the heating element like MOSFET, or or the heating element like MOSFET, or or the heating element, or or Secondary two polesTube or transformer. OVP can also be implemented, for example, by detecting the output voltage and transmitting overvoltage conditions through optocoupler.

The line sensing function

When the input voltage of the converter is lower than the specified range and let it restart, the voltage returns to this range. I feel that the voltage can be a rectified and filtering voltage. In this case, the functional effects are used as a power -off protection, or in the system with the front end of the PFC pre -regulatory device, output the PFC -level voltage. In this case, in this case, in this case, in this case, in this case, in this case, in this case, in this case This function plays a role of power -on and power -off.

L65A Turn off the comparator through internal underwriting, as shown in Figure 30 box diagram, and its non -counter -phase input is obtained at the pin 7 (line). The internal reference of the comparator is 1.24 V, and the voltage on the line pin is prohibited lower than the internal reference voltage. In these conditions below: soft start discharge, PFC U stops opening, consumes IC reduction. When the voltage on the needle is higher than the reference. The comparator provides current lag, not more common voltage lag: as long as the line pin is lower than the reference value, if the voltage is higher than the reference value, it is disconnected. This method provides additional freedom: it can be appropriately selected by the outer partition (see below). On the contrary, the fixed threshold is automatically fixed to the other, depending on the built -in stagnation of the comparator.

When the circuit is under pressure activation, start the generator to continue working, but there is no PWM activity, so the VCC voltage (if it is not provided by other power supply) continues to start and UVLO threshold The oscillating between the time sequencing is shown in the sequential chart. As an additional safety measure (for example, the low -voltage side resistor is opened or lacks, or the non -power factor correction system, if the input voltage is abnormal when the pins exceed 7 V, the L6599A is closed. If the power supply voltage is always higher than the UVLO threshold, the voltage should be when the voltage is the voltage. When it is lower than 7V, IC is restarted. When the device is running, the line pins are a high impedance input that connects to the value resistance, so it is easy to pick up noise, which may change the closing threshold or during the ESD test, give an IC accident. The reason for closing. It can bypass sales to prevent any small capacitor failure.

If this function is not used, the needle foot must be connected to a voltage greater than 1.24 V, but lower than the 6 V (7 V thresholds the most most thresholds the most. Bad conditions).

Guidance section

The power supply of the floating high -voltage side part is obtained by self -raising circuit. This solution usually requires a high voltage to quickly recover the diode (DBOOT, Figure 31A) for it to give it to give it to give it to give it to give it to give Self -raising capacitor CBOOT charging. In the L6599A patent integrated structure, this external diode is replaced. It is driven by a third quadrant with a low -voltage side drive (LVG). The diode is inserted as shown in Figure 31B. 123]

The diode can prevent any current from flowing back from VBOOT pinsWhen the internal capacitor of VCC is incomplete, the power supply will be closed quickly. The voltage of the driver DMO is more necessary than the power supply voltage VCC. The voltage was obtained by internal charge pumps (Figure 31B). The bootstrap structure introduces a voltage drop when charging CBOOT (that is, when the low -voltage side drive is opened), which will be MOSFET with operating frequency and external power. It is a decrease in R (DS) and the total diode that passes through the tandem. In low frequencies, this decline is very small and can be ignored, but as the operating frequency increases, it must be considered. In fact, a decrease in the amplitude of the driving signal can significantly increase the external high -edged MOSFET and its conductive loss. This problem is suitable for designing converters with high resonance frequency (indicating, u0026 gt; 150 kHz), so they also run at full loads at high frequencies. Otherwise, the converter is running under high -frequency light load, and the current flows in the MOSFET of the semi -bridge is low. Therefore, generally, R (DS) is not a problem. However, checking is wise, the following formula is very useful for the decline in the calculation guidance program:

Among them ON is Bootstrap DMO (150 watts, typical values) and TCHARGE are the opening time of the boot driver. It is about equal to the conversion cycle minus half of the td TD. For example, the total grid charge using MOSFET is 30nc, and the voltage drop on the self -raising drive is about 3V200 kHz switch frequency:

If the significant decline in the driver is a problem, it is a problem. It can be used, so it saves deletion on the R (DS) of internal DMO.