Features

● gain bandwidth: 50MHz

● Zero Division distort topology: excellent THD+N: 0.0004%

cmrr: 100db (minimum)

Enter 100MV

●

Low noise: at 100kHz is 4.5NV/ Hz

● conversion rate: 25V/ μs

]

●

快速沉降：0.3μs至0.01%

●

精度：

低偏移：100μV

[ 123] low input bias current: 0.2Pa

●

to 5.5V operation

● Regulating signal

● Data collection

● Process control Filter

● Test Equipment

● Audio

● Broadband amplifier [ 123] Explanation

OPAX365 ZER #8709; -Candic series, rail pairing, high performance, CMOS operational amplifier optimized to a very low voltage, single power application. Rail -to -rail input/output, low noise (4.5NV/) and high -speed operation (50MHz gain bandwidth) make these devices the ideal choice of driving sampling modulus converter (ADC). Applications include audio, signal adjustment and sensor amplification. OPA365 series operational amplifier is also very suitable for mobile phone power amplifier control circuit.

Its characteristics include a good co -mode suppression ratio (CMRR), no input -level cross distortion, high input impedance, and rail pairing input and output. The input common modular range includes negative electrode and positive power supply. The output voltage swing is within 10mv range of the rail.

OPA365 (single version) offers micro SOT23-5 and SO-8 software packages. OPA2365 (dual version) is provided in the SO-8 software package. All models are running at the temperature from 40 ° C to+125 ° C. Single versionThe dual version has the same specifications to achieve the maximum design flexibility.

Order information

(1), the latest software package and ordering information, please refer to the end of this file Software options appendix.

pin configuration — chorer view

(1), NC indicates that there is no internal connection.

Typical features

Unless there are other instructions, when TA u003d+25 ° C, VS u003d+5V, CL u003d 0pf.

Application information Working features OPA365 amplifier parameters are completely specified from+2.2V to+5.5V. Many specifications are suitable for 40 ° C to+125 ° C. In typical features, parameters that can show significant changes related to working voltage or temperature. Total plane layout guide

OPA365 is a broadband amplifier. In order to achieve the comprehensive operating performance of the equipment, a good high -frequency printing circuit board (PCB) layout practice is required. Low loss 0.1 μF bypass capacitors must be connected between the feet of each power supply and the grounding of the device as close to the device. The trajectory of bypass capacitors should be designed as minimal inductance.

Basic amplifier configuration

Like other single power supply amplifiers, OPA365 can use single power or dual -power operation. The typical dual power connection is shown in Figure 1, and there is only one supply connection. The OPA365 configuration is the basic inverter amplifier of the gain of 10V/V. The output voltage of the dual power connection is zero -centered, and the output voltage of the single power connection is centered on the co -mode voltage VCM. For the circuit shown, this voltage is 1.5V, but it may be any value within the range input voltage range. The voltage range of OPA365 VCM exceeds 100 millivolves of the power rail.

Figure 1: Basic circuit connection

FIG Essence The pressure division also provides partial pressure for the premium component.

Input and ESD Protection

OPA365 integrates internal static discharge (ESD) protection circuit on all pins. For input and output pins, this protection is mainly composed of a current -controlled diode connected between input and power pins. These ESD protection diode also provides a circuit and input drive protection, provided that the current is limited in absolute10mA described in the maximum rated value. Figure 3 shows how to add a series input resistance to the driver input to limit the input current. The increased resistance generates thermal noise at the amplifier input terminal, and its value should be kept at the minimum value in the application of sensitivity to noise.

Rail -to -rail input

OPA365 product series has a real rail input operation, and the power supply voltage is low to ± 1.1V (2.2V). The unique Zer #8709; cross -input topology eliminates many typical input offset transition areas of rail -to -rail complexation amplifiers. This topological structure also allows OPA365 to provide excellent co -mode performance throughout the entire input range, which is expanded by 100MV outside the two power rails, as shown in Figure 4. When driving ADC, OPA365's high linear VCM range ensures that the linear performance of the computing amplifier/ADC system will not be affected.

FIG. 5 shows a simplified orbital to rail input circuit schematic diagram.

Capaciture load

OPA365 can be used for applications that need to drive capacitance loads. Like all computing amplifiers, there may be specific examples of OPA365 that may become unstable and cause oscillation. When determining the gain layout of the amplifier, special consider whether the output structure of the amplifier is stable. The unit gain (+1V/v) The operating amplifier driving capacitance load ratio in the buffer structure shows a greater instability trend of the amplifier that works under higher noise gain. Together with the output resistance of the computing amplifier, the capacitance load generates a pole in the feedback circuit to reduce the phase of the margin. With the increase of the capacity load, the degeneration of phase margin has also increased. When working at the unit gain configuration, OPA365 remains stable, and the pure capacitor load is as high as about 1NF. The equivalent series resistance (ESR) of some super -large capacitors (CL GT; 1 μF) is enough to change the phase characteristics in the feedback loop, thereby keeping the amplifier stable. Increasing the closed -loop gain of the amplifier allows the amplifier driver to grow larger and larger. When observing an overwhelming response at a higher voltage gain, the improvement of this ability is obvious. See typical feature maps, small signals and capacitance loads.

A technology that improves the capacitor load driving capacity of the unit gain amplifier is to connect a small resistance in series at the output end, usually 10 #8486; to 20 #8486; see Figure 6. The resistor significantly reduces overwhelming and ringing associated with large capacitance loads. One possible problem with this technology is that a sterilizer is composed of an additional series resistance and any resistance to the capacitance load. The dividend introduced the gain error at the output end, thereby reducing the output swing. The error caused by the division may be insignificant. For example, load resistance RL u003d 10K #8486;, RS u003d 20 #8486;The gain error is only 0.2%. However, when RL decreases to 600 #8486; (OPA365 can drive), the error is increased to 7.5%.

The output level of zero (0V)

Some single power supply applications require the computing amplifier output from 0V swinging to a normal standard voltage and high accuracy. For example, an operational amplifier used to drive input range from 0V to+5V. The output load with a very light orbit transition amplifier can achieve the output level of 0 V millions (or high -end+VS), but not 0V. In addition, as the required load current increases, the deviation from 0V will become greater. This deviation is increased due to the restrictions of the CMOS output level.

When a drop -down resistor is connected from the amplifier output to the negative voltage source, the OPA365 can reach the output level of 0V or even a few millivolves below 0V. Below this limit, non -linearity and restrictions have become obvious. Figure 7 illustrates the circuit using this technology.

When OPA365 is connected as a unit gain buffer, a drop -down current of about 500 μA is required. The actual terminal voltage (VNEG) is 5V, but other convenient negative voltage can also be used. The drop -down resistor RL is calculated based on RL u003d [(vo vneg)/(500μA)]. Use the minimum output voltage of 0V (VO), RL u003d [0V ( 5V)]/(500μA)] u003d 10K #8486;. Keep in mind that lower terminal voltage will lead to smaller drop -down resistors, loading output during the output voltage offset.

Please note that this technology does not apply to all operational amplifiers, but only applicable to the operation amplifier, such as OPA365 specially designed to work in this way. In addition, operating the OPA365 output under 0V will change the output working conditions, which will lead to a reduction in the opening gain and bandwidth of the ring. When driving capacitance loads, remember these precautions, because these conditions will affect the transient response and stability of the circuit.

Active filter

OPA365 is very suitable for the source filter application of broad band width, rapid conversion rate, low noise, and single power computing amplifier. Figure 8 shows a 500kHz second -order low -pass filter that uses multiple feedback (MFB) topology. The selected components can provide the largest flat Bartworth response. In addition to the deadline, the rolling is 40db/dec. Batworth's response is very suitable for applications that require predictable gain characteristics, such as anti -hybrid filters used before ADC.

When considering the MFB filter, you need to pay attentionThe point is that the output is reversed relative to the input. If you do not need or do not need this kind of reversal, you can achieve non -reversal output through one of the following options: 1) Add a reverse placed large device; 2) Add additional second -order MFB level; or 3) use non -conversion filter topology topology As the Sallen key (as shown in Figure 9).

With the FilterPro program of TI, MFB and Sallen-Key, low-pass, and high-pass filter synthesis can be completed quickly.

Drive Mo Digital Converter

Very wide co -mode input range, rail -to -rail input and output voltage capacity, and high speed, making OPA365 an ideal drive of modern ADC. In addition, because it does not have the input offset transition characteristics of some rail CMOS computing amplifiers, the OPA365 provides low THD and good linearity throughout the range of input voltage.

FIG. 10 shows the OPA365 driver ADS8326, 16 -bit, 250KSPS converter. The amplifier is connected to a unit gain, without a conversion buffer, and the output width is 0V, making it directly compatible with the ADC to minus the full -scale input level. The small negative voltage generated by the 0V level through the positive voltage drop of the diode is OPA365 V pins to supply power. Small signal switching diode or Schartki diode provides an appropriate negative power supply voltage of 0.3 to 0.7V. Power supply between rails is equal to V+, plus small negative voltage.

A method of driving the ADC is to use a slightly compressed ADC full marking input range (FSR), instead of reducing the output swing to 0V. For example, when 16 -bit ADS8361 (as shown in Figure 11), when the+5V power supply and 2.5V VREF power supply, its maximum FSR is 0V to 5V. The idea is to match the ADC input range with the full linear output range range of the computing amplifier; for example, the output range is +0.1 to+4.9V. The reference output of ADS8361 ADC is divided through a resistor. The ADC FSR then became 4.8VPP, centered on the+2.5V COM MON mode voltage. The current from the ADS8361 reference pin is limited to about ± 10 μA. Here, use 5 μA to bias the frequency division. The resistor must accurately maintain the ADC gain accuracy. Another advantage of this method is to eliminate negative power supply voltage; it does not require additional power current.

Computing amplifier and ADS8361 include an RC network composed of R1 and C1. It not only provides high -frequency filtering functions, but more importantly is to keep the converter's internal capacitance charging as an electric library. This ability ensures that the output line of the computing amplifier is maintained as the ADC input characteristics of the ADC input characteristics throughout the conversion cycle. According to specific applications and ADC, it may be neededOptimize the R1 and C1 values u200bu200bto obtain the best transient performance.

FIG. 12 shows the OPA2365 dual operation amplifier provided in the ADS1258 bridge sensor circuit. It follows the ADS1258 16: 1 multi -way replica as a differential input/differential output amplifier connection. The voltage gain at this stage is about 10V/V. Drive the internal ADC inside the ADS1258 in the differential mode (instead of a single -end), which makes full use of the linear performance of the converter. In order to obtain the best co -model suppression, the two R2 resistors should be closely matched.

Please note that in Figure 12, the amplifier, bridge, ADS1258 and internal benchmark are powered by the same+5V power supply. This ratio connection helps eliminate the drift effect and noise of the excitation voltage.

In order to get the best performance, the+5V power should be as noise and transient as much as possible.

When the data rate of the ADS1258 is set to the maximum value and enables the chopping function, the circuit generates 12 -bit no noise resolution under the input of 50MV at full standard.

The chop feature is used to reduce the offset and offset of ADS1258 to a very low level. A 2.2NF capacitor is required to bypass the sampling current at the ADC input terminal. 47 #8486; The resistor provides an isolation of a relatively large 2.2NF capacitance load for OPA2365 output.