General description

LM3524D series is the improved version of the industry LM3524. It improves specifications and additional functions, but is compatible with the existing 3524 family. The new features reduces the need for additional external circuits that are often needed in the original version. The 5V reference accuracy of LM3524D is ± 1%. The current loading capacity of the output drive transistor is increased to 200 mAh, and at the same time, the VCESAT is reduced and the VCE breaks to 60V. The co -mode voltage range error has been increased to 5.5 volts to eliminate the resistance division of the 5V reference. In LM3524D, the circuit bias line has been closed and sold. This prevents the pulse amplitude and frequency of the oscillating device due to shutdown. Under the high frequency (.300 kHz), Alzo increased from 35%to 44%per production. Other 3524S duty cycle. In addition, LM3524D can now perform external synchronization through pin 3. In addition, a lock is added to ensure that even in a noisy environment, each cycle has a pulse. This LM3524D includes bipolar inhibitory logic to ensure that only when the closing conditions are eliminated, only the first clock pulse arrives. This function can prevent the same output from two consecutive pulses, thereby reducing the saturation of the core possibility of pushing the slide design.

Features

can be completely swapped with the standard LM3524 series

± 1%accuracy 5V benchmark, heat shutdown

output current is 200 mia DC power [ 123]

60V output capacity

Wide -co -mold input range of error placing large instruments

A pulse per cycle (noise suppression)

improved the maximum accounting under high frequency. Empty Bi

Dual pulse suppression

Synchronization through pin 3

Absolute maximum rated value (Note 5)

] Power supply voltage 40V

The power supply voltage

(LM2524D) 55 volt

(LM3524D) 40 volts

output current DC (each each each each One) 200 MA

oscillator charging current (pin 7) 5 mia

Internal power consumption 1W

Work knot temperature

range (Note 2)

lm2524d 40 ; C to+125 ; c

lm3524d 0 ; C to+125 ; c

The highest Jie temperature 150 ;

Storage temperature range 65 ; C to+150 ; C

Lead temperature (welding 4 seconds)

m, n packs. 260 degrees Celsius

Electric characteristics (Note 1)

Electric characteristics (continued)

Electric Features (continued)

Note 1: Unless otherwise explained, these specifications are suitable for TA TJ 25 ; C. Black bodies are suitable for rated temperature range: LM2524D is 40 ; C to 85 ; CLM3524D is 0 ; C to 70 ; C. Vin 20V, fosc 20kHz.

Note 2: For running at high temperatures, the equipment in N packaging must be based on the thermal resistance of 86 ; C/W to reduce the rated value and connect to the environment. In M packaging, the device must be at 125 ; C/W. Connect to the ambient temperature decrease.

Note 3: ensure the test limit and perform 100%test in production.

Note 4: Guarantee design limit (but not 100%production test) exceeding the temperature and power supply range of the instructions. These restrictions are not suitable for calculating the quality level of shipments.

Note 5: Absolute maximum rated value indicates the limit that may cause damage. During operation, DC and AC electrical specifications are not applicable to device exceeding its rated working conditions.

Note 6: Point 1, 4, 7, 8, 11, and 14 ground; pin 2 2V. All other inputs and output openings.

Note 7: The value of the CT capacitor can change with the frequency. For high -frequency operations, this capacitor must be selected carefully. The polystyrene is used in this test. You can also use NPO ceramics or polypropylene.

Note 8: OSC amplitude measurement opening. The available current can be limited to 1 mA, so you must carefully limit the capacitance load of the pulse.

Typical performance features

Function description

internal voltage regulator

] LM3524D has a 5V, 50 mA, short -circuit protection voltage regulator. This voltage regulator provides all internal circuits of the device and can be used as an external reference. For input voltage less than 8V, 5V output should be short -circuited to the pin 15 (VIN), and the 5V regulator should be disabled. The short circuit of the input voltage with these pins must be limited to the maximum 6V. If you use a 6V -8V input voltage, you must add a pre -adjuser, as shown in Figure 1.

The minimum CO required for stability is 10 μF

oscillator

LM3524D provides a stable plate oscillator. Its frequency is set by an external resistor RT and a capacitor CT. The relationship between the frequency of ART and CT and the oscillator is shown in Figure 2. The output of the oscillator provides a trigger internal trigger, which directed PWM information to the output, and an anti -hidden pulse to ensure that there will be no cross -transmission. The width of the removal pulse or the dead area is controlled by the controlled CT value, as shown in Figure 3. The recommended RT value is 1.8 k to 100 k , CT is 0.001 μF to 0.1 μF. If two or more LM3524Ds must be synchronized, the easiest way is to connect all the pins of all pins, TIE all needle 7 (together) connect to a CT, and keep all needle feet 6 open and remove one method to connect to one method Unless the LM3524D interval exceeds 6 inches, the effect is good. The second synchronization method is suitable for any circuit layout. A LM3524D specified as a host must set its RTCT to the right time period. Each LM3524D of another slave should set an RTCT end of more than 10%. All needle feet 3 must be connected to each other so that the main device is reset to the device correctly. The oscillator can be synchronized with the external clock. The internal self -tissue oscillator frequency is set to a pulse strings (about 3V) on the clock (about 3V) on the clock slower than the external clock and driver pins. The pulse width should be greater than 50 ns to ensure that it is completely synchronized

Error amplifier

Error amplifier is a differential input, a cross -guide amplifier. Its gain, nominal 86 decibels, is loaded by any feedback or output. This output can be loaded with a combination of pure resistance or resistor and rare earth activity elements. The relationship diagram of the amplifier gain and output The load resistance is shown in Figure 4.

function description (continued)

The output of the amplifier, or input to the pulse width modulator, can be easily covered, because its output impedance It is very high (zo.5 m ). Therefore, the DC voltage can be applied to the pin 9, which will put the coverage error and the mandatory output specific duty cycle. An example may be a non -regulating motor speed control to apply a variable voltage on the pin 9 to control the speed of the motor. The relationship between the output occupation ratio and the voltage of the needle 9 is shown in Figure 5. The duty cycle is calculated to output to the oscillator cycle according to the percentage of each duty ratio. The parallel output output doubles the observed duty ratio.

The co -mode input range of the amplifier input is 1.5V – 5.5V. The vehicle regulator is used to biased the input within this range.

Flow limit

The function of the current limiting amplifier is to cover the output and pulse width of the override error amplifiercontrol. When a current is performed between+cl. Extreme induction voltage and CLSENSE terminal. Increased sensing voltage AP about 5%will cause 0%output occupation ratio. Care should ensure that it should not exceed the scope of the co -mode of the+1.0V input from 0.7V to+1.0V. In most applications, the current limit sensing voltage is generated by the current through sensing resistance. The measurement method of accuracy is limited by sensory accuracy. Through a smaller offset current, it is usually 100 μA and flows from+C to CL. The output of the output level LM3524D is the NPN transistor, which can be a maximum current of 200 mAh. These crystal tubes are driven 180 ; different phases, there are unlikely open collectors and transmitters, as shown in Figure 6.

Typical application (continued)

Basic theory and application of the switching regulator: The basic circuit of the booster switching voltage voltage circuit is shown in Figure 12 as shown in Figure 12 And a practical circuit design uses LM3524D in Figure 15.

The working principle of the circuit is as follows: Q1 is used as a switch switch time controlled by the pulse width module. When Q1 is turned on, the power supply is extracted from the vehicle identification number (VIN) and provided the load through L1; the VA is about VIN, D1 is reverse bias, and CO is charged. When the Q1 closes the electrocompany L1 to keep the VA's negative electrode, the current flows, D1 begins to be turned on, and the load current flows through D1 and L1. The voltage at VAI is smooth by L1, and the CO filter provides a clean DC output. The flowing current L1 is equal to the nominal DC load current plus some u0026#8710; IL, which is caused by the voltage change on it. A's best experience is to set u0026#8710; ILP-P. 40%x IO

Calculating output filter capacitor Co: Figure 13 shows the current of L1 relative to Q1 tons, and the number of TOFF times ( VA is at the collector of Q1). The current that must be flowing to the load and the current of Co.CO will be the difference between IL and IO. ICO IL-IO can be seen from Figure 13 that the current will flow into TOFF from the second half to the first half of the year, or once, ton/2+toff/2. The current flowing current is u0026#8710; IL/4. Results u0026#8710; VC or u0026#8710; VO's description is as follows:

In order to achieve the best adjustment effect, the current of the inductor cannot be allowed to be reduced to zero. Some minimum load current IO, so the electrical sensor current, as shown below:

The complete antihypertensive switch regulator schematic diagram, using LM3524D, as shown in Figure 15. Crystal tube Q1 and increase Q2The regulator that increases the output to the 1ALM3524D is divided into two -half error disappear input in its co -modular range. Because each output transistor has half of the period, it is actually 45%, and they have been parallel to the possible duty ratio in parallel, up to 90%. This can reduce the possible input voltage. The output voltage consists of:

Among them, VNI is the voltage input of the error amplifier when the error amplifier is not reversed. The resistor R3 sets the current limit to:

Figure 16, 17, and the 5V of the PC plate layout and filling Figure 15, 1A regulator schematic diagram. The performance of the regulatory agency is shown in Table 1.

Installed on the cooling wall radiator V5-1.

q1 bd344

q2 2n5023

l1 u0026 gt; 40 turns 22 Line 22, located on the heart of K300502.

Typical application (continued)

The voltage switch staber

FIG. 18 shows the basic circuit regulator of the voltage switch. In this circuit, Q1 is used as alternating VIN on the sensor L1. During this time, TON, Q1 extracted and stored and stored in L1 from the Vehicle Identification Number (VIN); D1 is the opposite bias and IO is the Q1 provided by the charge stored in the CO, TOFF, voltage voltage V1 will rise to the point D1. The output current is supplemented by the loss of tons of the output current through L1, D1 to the load, and any charge of CO. Here, just like the antihypertensive regulator, the current through the L1 has a DC component u0026#8710; IL. u0026#8710; IL once again chose to be about Illinois. Figure 19 shows the current switching time of the inductors related to Q1.

Typical application (continued)

This equation indicates that the input current or induction current is twice as large as the output current (1+TON/TOFF). Because of this factor and VIN, IIN (DC) can also be expressed as:

At present, hypothesis η 100%, of which actual efficiency may be ηMax due to saturation voltage Q1 and positive guide due Pass voltage D1. Internal consumption is via VSAT or VD1 because these voltages are the average current, or IIN. For VSAT VD1 1V, this power loss becomes iin (DC) (1V). 12Max is:

This equation only assumes DC loss, but ηMax is due to Q1 and D1.

Typical application (continued)

When calculating the output capacitor Co, you can see that IO is supplied during the CO ton period. During this period, the voltage change time on COIt will be u0026#8710; vc u0026#8710; VO or regulator.CO's calculation is:

In the formula: L1 is Henry, F is the switching frequency, the unit is the above theory for Hz to complete the above theory, and the completion of the booster switching regulator is shown in Figure 20EssenceBecause VIN is 5V, VREF is zero VIN.The input voltage is removed by 2 to offset the inverter input of the large offer.The output voltage is:

Network D1 and C1 form a slow starting circuit.This keeps the output of the error leaflet minimum at the initial low level.No slowly starting the circuit inductor may be saturated when connecting, because it must provide a peak value current to charge the output capacitor from 0V.It should also be noted that the circuit has no supply to reject.By adding a reference voltage at the non -inverse input end to the error, see Figure 21, the input terminal voltage changes are rejected.LM3524D can also be used for inductive sensor switch supervisors.FIG. 22 shows the polar inverter. If it is connected to Figure 20, it can provide 15V non -regulatory output.