Features

4 channel protection low -side drive

- NMOS FET

- Integrated inductor clamping diode [123 ]

-Parallel interface

DW packaging: 1.5-a (single channel opening)/800 mAh (four-channel opening) maximum driving current (at 25 ° C)

PWP package: 2-a (single channel opening)/1-a (four-channel opening) Maximum driving current (25 ° C, proper PCB heat dissipation)

8.2-V to 60-V working power supply voltage range

surface installation component

relay; relay Driver

Single -pole step motor drive

solenoid valve driver

General low -voltage side switch application

] Explanation

DRV8803

provides a 4 -channel low -pressure side drive with current protection. It has a built -in diode to cut off the interruption of transients generated by the sensing load, which can be used to drive the single -step motor, DC motor, relay, thread tube or other loads.

In SOIC (DW) packaging, DRV8803 can provide continuous output currents of up to 1.5-a (one channel opening) or 800 mA under 25 ° C at 25 ° C. In HTSSOP (PWP) packaging, it can provide continuous output currents of up to 2-a (one channel open) or 1-a (four channels) at a temperature of 25 ° C at a temperature of 25 ° C. Essence

This device is controlled through a simple parallel interface.

Provide an internal shutdown function of over -current protection, short -circuit protection, lack of pressure locking and overheating, and the fault is indicated by the fault output pin.

DRV8803 has 20 pin thermal enhanced SOIC packaging and 16 pin HTSSOP packaging (environmentally friendly: Rohs amp; no sb/br).

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

Simplified schematic diagram

Typical features

Detailed description

Overview [overview [overview

Overview [overview

Overview [overview

Overview [overview

123]

DRV8803 device is an integrated 4 passLow -end drive solutions are suitable for any low -end switch applications. Integrated current protection limits the maximum value of motor current to a fixed maximum value. The four logic input control the low -end drive output, including four N -channel MOSFETs, and its typical RDS (on) is 500 m A single power supply input VM is used as a equipment power supply and adjusts the internal adjustment to power the internal low -pressure door drive. The motor speed can be controlled by the pulse width between 0 kHz and 100 kHz. By raising the Nenbl pin, the device can be disabled. Heating protection allows the device to shut down automatically when the mold temperature exceeds the TTSD limit. If the VM is lower than the underwriting threshold, the UVLO protection will disable all circuits in the device.

Function box diagram

Feature description

Output drive

DRV8803 device contains four protected low -end drives Essence Each output has an integrated clamp diode, which is connected to a public pin VCLAMP.

VCLAMP can be connected to the main power voltage VM. VCLAMP can also be connected to Zina or TVS diode to VM, allowing the switching voltage to exceed the main power voltage VM. When the driver requires a fast current attenuation load, this connection is beneficial, such as a single step into the motor.

In all cases, the output voltage must not exceed the maximum output voltage specification.

Protective circuit

DRV8803 equipment has sufficient protection to prevent pressure, over current and overheating events.

Overcurrent protection (OCP)

The analog current limit circuit on each FET is limited to the current by removing the grid driver. If the duration of the analog current is more than the TOCP mud removal time (about 3.5 μs), the driver will be disabled, and the NFAULT pin will be driven to a low level. The driver will keep a disabled state within the review time (about 1.2 milliseconds), and then the fault will be automatically cleared. If the resetting pin is activated or the VM is removed and the application is re -applied, the fault will be removed immediately.

Hot shutdown (TSD)

If the mold temperature exceeds the safety limit, all output FET will be disabled, and the NFAULT pin will be driven low. Once the mold temperature drops to the safe level, the operation will automatically restore.

IOU locking (UVLO)

If the voltage on the VM pins is lower than the voltage of the underwriting lock at any time, all circuits in the device will be disabled, the internal logic will be heavy, and the internal logic will be heavy. Set. When VM is higher than the UVLO threshold, the operation will be restored.

Equipment function mode

Parallel interface operation

DRV8803 device consists of a simpleSingle parallel interface control. Logically, the interface is shown in Figure 6.

Starting and reset operation

Nenbl pin enable or disable the output drive. Nenbl must be lower to enable the output. Note that Nenbl has an internal drop -down list.

When driving high electricity, the internal logic of resetting the pin is used. When reset activation, all inputs are ignored. Note that RESET has an internal drop -down menu. It also provides internal power and reset, so it is not necessary to drive reset when power is powered.

Application and implementation

Note

The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

The DRV8803 device can be used to drive the single -step motor.

Typical application

Design requirements

Table 1 lists the design parameters of the design example.

Detailed design program

motor voltage

The motor voltage used depends on the rated value of the selected motor and the required torque required torque required Essence The higher voltage shortens the current rising time in the step motor coil, allowing the motor to generate a larger average torque. Using higher voltage can also make the motor run at a faster voltage and faster speed.

Drive current

The current path starts with the power VM, through the sensing winding load, and the low -side sink NMOS power FET. The power consumption loss of the single groove NMOS power FET is shown in the formula 1.

On the standard FR4 PCB, the DRV8803 equipment has Channel, PWP is packaged at 25 ° C. The maximum square -rooted current varies depending on the design of PCB and the environmental temperature.

Application curve

Power suggestion

Body capacitance

A suitable local volume capacitance is the design of the motor drive system design An important factor. Generally speaking, more volume capacitors are beneficial, but the disadvantage is increased cost and physical dimensions.

The required local power capacity depends on multiple factors, including:

the highest current required for the motor system.

capacitance and ability to provide current.

Positive inductance between the power supply and the motor system.

acceptable voltage ripples.

the type of motor (brush, brushless DC, step motor).

motor braking method.

The inductance between the power supply and the motor drive system will limit the change rate of power current. If the local large -capacity capacitance is too small, the system will respond to excessive current requirements, or uninstall from the motor as the voltage changes. When using sufficient large -capacity capacitors, the motor voltage remains stable and can quickly provide large current.

The inductance between the power supply and the motor drive system will limit the change rate of power current. If the local large -capacity capacitance is too small, the system will respond to excessive current requirements, or uninstall from the motor as the voltage changes. When using sufficient large -capacity capacitors, the motor voltage remains stable and can quickly provide large current.

The rated voltage of a large -capacity capacitor should be higher than the operating voltage, so that it can provide a lot of time when the motor transmits energy to the power supply.

Layout

Layout Guide

The placement of large -capacity capacitors should be reduced as much as possible to drive the distance from the large current path of the motor -driven device. The width of the metal trace line should be as wide as possible, and multiple excess perforated should be used when connecting the PCB layer. These methods minimize the inductance and allow large capacitor to transport high current.

Small capacitors should be ceramic and placed in a place where the device pin is very close.

The output of high -current equipment shall use wide metal traces.

The equipment hot pad should be welded on the floor floor floor of the PCB. Multiple pores should be used to connect to large bottom ground planes. Use large metal planes and multiple holes to help the I2 × RDS (ON) heat generated in the dissipation device.

layout example

Hot consideration

Hot protection

DRV8803 device has the heat shutdown (TSD TSD) mentioned above (TSD To. If the mold temperature exceeds about 150 ° C, the device will be disabled until the temperature drops to the safe level.

Any trend of the device entering TSD indicates that the power consumption is too large, insufficient heat dissipation, or the environmental temperature is too high.

Power consumption

The power consumption of the DRV8803 device is mainly consumed by the output field effect tube resistance (RDS (on)). When running a static load, the average power consumption of each FET can be roughly estimated through Formula 2:

In the formula:

P is a one FET's power consumption

RDS (ON) is the resistance of each fet

IOUT is equal to the average current consumed by the load.

Under the condition of starting and failure, the current is much higher than the normal operating current; considering these peak currents and its duration. When multiple loads are driven at the same time, all effective output levels must be added.

The maximum power consumed in the device depends on the ambient temperature and heat dissipation.

Note that RDS (on) increases as the temperature increases, so when the device is heated, the power consumption will increase. When determining the size of the heat sink, this must be considered.

Heating

DRV8803DW packaging uses a standard SOIC shape, but the center pins are fused on the chip pad to remove the calories in the device more effectively. The two central leads on each side should be connected together to eliminate the calories of the equipment as much as possible. If the copper zone is on the other side of the PCB, the thermal hole is used to convey the heat between the top and the bottom layer.

Generally speaking, the more copper area provided, the greater the consumption power.

DRV8803PWP package uses HTSSOP package and exposed PowerPad #8482 ;. PowerPad package to remove the calories in the device. In order to correctly operate, the pad must be connected to the copper heat on the PCB to dissipate heat. On the multi -layer PCB with the floor, this can be achieved by adding multiple holes to connect the hot pad to the horizon. On PCB without internal planes, you can add copper area to any side of the PCB to dissipate heat. If the copper zone is on the other side of the PCB, the thermal hole is used to convey the heat between the top and the bottom layer.