Features

Direct path #8482;

- Eliminate the pop -up/click sound

- Eliminate the output DC blocking capacitor

- Provide a flat frequency response of 20Hz –20kHz

Low noise and THD

-Sto signal ratio gt; 102db

- Typical vn lt; 15 mvms [123 [123

]

–Thd+n lt; 0.05%20 Hz — 20 kilus

2.5-k load output voltage

–2 VRMS, 3.3-v vRMS, 3.3-v v Power supply voltage

-3 VRMS, 5 V power supply voltage

3VRMS output voltage is 2.5 k ; Differential input

Application

Topstick box

PDP/LCD TV

Blu -ray CD #8482 DVD player

Home Theater

Instructions

DRV602

PW is a 3VRMS without a stereo -sound line drive, design allows migration to move In addition to the output DC blocking capacitor to reduce the number and cost of the component. This device is very suitable for single -power electronic products with key design parameters.

Directpath design #8482; technical, DRV602 can drive 3VRMS to enter the 2.5K #8486 of 5V power voltage; in the load. The device has a differential input and uses an external gain setting a resistor. The resistance supports the gain range of ± 1V/V to ± 10V/V. The use of external gain resistors also allows the second -order low -pass filter to supplement DAC and SOC converters. The line output of DRV602 has a built -in shutdown control with ± 8kv IEC ESD protection DRV602 (known as #39; 602), which is used to control without pop -up switch control.

Compared with the traditional method of generating 3VRMS output, the use of DRV602 in audio products can reduce the number of components. DRV602 does not require a power supply greater than 5V to generate 8.5VPP output, nor does it need to be powered by meso. DRV602 integrates its own charge pump to generate a negative power rail and provide a clean, non -pop -up ground bias 3VRMS output.

DRV602 is encapsulated by 14 stitches Tssop.

If higher signal -to -noise ratio, fine -tuning DC offset and external underwriting mute function are beneficial in the application, TI recommends using DRV603 (SLOS617) compatible with encapsulation shape.

For stereo lines and stereo HP drivers, see DRV604 (SLOS659).

Application circuit

R1 33K , R2 68K , R3 100K # 8486;, C1 150pf, C2 15pf, C3 1MF; Differential input, single -end output, second -order filter. 40kHz -3DB frequency, gain 2.06.

Typical features

VDD 3.3V, TA 25 ° C, C (pump) c (pvss) 1 μF, CIN 1 μF, RIN 33 k , RFB 68 k , RL 2.5 kΩ (unless there are other instructions).

Application information

Line driver amplifier

Single -electric source line driver amplifier usually requires DC capacitors. The above figure in FIG. 5 illustrates the connection between the traditional line drive amplifier and the load and output signal.

The value of the DC closed lock capacitor is usually very large. During the power -powered period, a quiet circuit is required to minimize the click. Output capacitors and mute circuits consume PCB area, increase assembly costs, and reduce the preservation of audio output signals.

Direct path #8482; The structure of the amplifier runs from a single power supply, but the internal charge pump provides a negative voltage track.

Combined with the positive track provided by the user and the negative IC, the equipment runs in an effective division mode.

The output voltage is now concentrated in zero, which can swing to the right or negative. Direct vertical amplifier does not require output DC blocking capacitors.

The bottom block diagram and waveform of FIG. 5 illustrates the structure of the ground reference wire drive. This is the architecture of DRV602.

The charge pump flight capacitor and PVSS capacitor

The charge pump flying capacitor, CPUMP, transfer the charge during the process of generating a negative power supply voltage. PVSS capacitors must be at least equal to the charge pump capacitor to allow maximum charge transfer. Low ESR capacitor is an ideal choice with a typical value of 1 μF. The capacitance value of less than 1 μF can be used, but the maximum output voltage may be reduced, and the device may not be able to run according to specifications.

Remove the capacitor

DRV602 is a direct path line drive playerBig instruments require enough power to be coupled to ensure that noise and total harmonic distortion (THD) are low. A good low -equal series resistance (ESR) ceramic capacitor is usually 1 μF, placed in the position of the PVDD lead as close to the device as possible, and the effect is the best. Putting this off -coupled container near DRV602 is important for the performance of the amplifier. For low -frequency noise signals, 10 μF or larger capacitors near the audio power amplifier are also helpful, but it does not need it in most applications because the PSRR of the device is very high.

Increase setting resistance range

Must choose the gain setting resistor RIN and RFB, so that the noise, stability, and input capacitors of DRV602 must be kept within the acceptable range. The voltage gain is defined as RFB divided by Rin.

The value of too low input requires a large input AC coupling capacitor, CIN. Choosing a high value will increase the noise of the amplifier. Table 1 lists the recommended resistance value of different gain settings.

Input the input -lock capacitor

DC input conservation capacitor needs to be connected to the input pins of DRV602 with the audio signal. These capacitors block the DC parts of the audio source and allow DRV602 to input appropriate bias to provide maximum performance. The input blocking capacitor also limits the DC gain to 1 to limit the DC offset voltage at the output terminal.

These capacitors and input resistance RIN form high -pass filter. The deadline is calculated with Formula 1. For this calculation, the capacitance used is input blocking capacitors, and the resistance is the input resistance selected from the Table 1. When the two of the two values are given, the frequency and/or capacitance can be determined.

Use DRV602 as a second -order filter

Some audio DAC currently used requires an external low -pass filter to eliminate external noise. This is possible to use DRV602 because it can be used like a standard operating amplifier.

Several filter topology can achieve single -end and differential. In FIG. 9, multiple feedback MFB with differential input and single -end input is displayed.

The figure shows an AC coupling capacitor to remove the DC component from the source. It is used to prevent any DC component in the source and reduce the DC gain to 1, which helps the output DC bias Move to minimize.

The resistance value should have a low value of low noise, but it should also have sufficient high value to obtain small -sized communication coupling caps. Using the proposed value, 33K, 68K, 100K, input AC Coupling capacitance with a small 1MF input AC capacitor can achieve 102DB DNR.

Popping free power supply

During the reduction process, by keeping ENable Pin at a low level, there is no pop -up power supply.The EN pin should be kept at a low level until the input AC coupling convergence container is fully charged, and then the EN pin is high; in this way, the AC coupling is appropriately charged to achieve no pop -up power power.Figure 10 illustrates priority.

Capacity load

DRV602 can directly drive up to 220pf high -capacitor load, and can be accepted by adding 10 or larger series resistance.High capacitance load.

layout suggestion

The recommendation layout of DRV602 can be seen in the DRV602EVM user guide (SLU248). The Gerber file can open the DRV602 product folder on the website, and then in the Tools and Software folderFind.

The gain setting the resistor RIN and RFB must be close to the input pin to minimize the capacitance load on these input pins and ensure the maximum stability of the DRV602.For PCB layout, please refer to the DRV602EVM user guide.