General description

LM5005 High -voltage switch regulator has the functions required to use the minimum external component to achieve high -efficiency high -voltage antihypertensive regulator. This easy -to -use regulator includes an antihypertensive switch with a 75V N -channel output current capable of 2.5 amp. The regulator control method is controlled based on the current mode using an analog current slope. The current mode control provides inherent line feedback, a cycle of circular current limit and easy loop compensation. The use of simulation to control the slope to reduce the pulse width modulation circuit, which can be reliable to control a very small duty cycle in high input voltage applications. The operating frequency can be from 50kHz to 500kHz. The oscillator synchronizes pipe foot allows multiple LM5005 regulators from synchronization or synchronization to the external clock. The additional protection function includes: current, heat shutdown and remote shutdown function. The device provides an enhanced power supply TSSOP-20 packaging with exposed mold connection pads to help heat dissipation.

Features

Integrated 75V, 2.5A N -channel antihypertensive switch

ultra -wide input voltage range from 7V to 75V

Internal high -voltage bias regulator

The adjustable output voltage from 1.225V

1.5%feedback reference accuracy

N current mode control of analog current

slope

] Single -resistant oscillator frequency settings

Synchronous input of oscillator

Avable soft start

Disclosure/spare input

Broadband band error release large device

Hot shutdown

Parce 123]

BST to GND 90V

Pre-connection area 76V

SW to GND (steady-state) -1.5V

BST to VCC 76V

VCC to GND 14V

BST to SW 14V

OUT to GND is limited to vin

SD, Sync, SS, FB to GND 8V

] ESD level (Note 2)

Human model 2KV

Storage temperature range -65 ° C to+150 ° C

Working fixed value (Note 1)

vin 7V to 75V

Working temperature 40 ; C ~+125 ; C

The electrical characteristics of standard fonts are suitable for TJ 25 ; C, and the thick body is suitable for the entire work temperature range. Vin 48V, RT 32.4K unless there is another explanation.

The electrical characteristics of the standard font are suitable for TJ 25 ; C, and the thick body is suitable for the entire working temperature range. Vin 48V, RT 32.4K unless there is another explanation. (Continuous)

Note 1: The absolute maximum rated value means that the device may be damaged after the limit is exceeded. The operating rated value refers to the purpose of the device operation to play a role. Please refer to the electrical characteristics about the specifications and test conditions of the guarantee.

Note 2: The human model is a 100pf capacitor, which is transplanted by 1.5K resistance to each pin.

Note 3: The minimum and maximum limit is a 100%production test performed under 25 ° C. By using statistical data, it can ensure the limit quality control (SQC) method within the working temperature range. The limit is used to calculate the national average factory quality level (AOQL)

Typical application circuit and box diagram

] Detailed operation description

LM5005 high -voltage switch regulator has

Use the minimum external component to achieve the function required by high -efficiency high -voltage antihypertensive regulators. This easy -to -use regulator integrates a 75V output current capacity to be 2.5 amp. The regulator control method is controlled based on the mode of analog current slope based on the current. Peak current mode control provides inherent line feedback, periodic current limits and easy loop compensation. This uses analog control slope to reduce the pulse width modulation circuit and allows reliable processing of very small duty cycle to be treated under high input voltage. The operating frequency can be programmed from 50kHz to 500kHz. The oscillator synchronizes pipe foot allows multiple LM5005 regulators to synchronize or synchronize with the external clock. The output voltage can be set from 1.225V. Fault protection functions include current limit, heat shutdown and remote shutdown function. The device is provided in the TSSOP-20 packaging, which has a cushion that helps heat dissipation. Functional frame diagrams and typical applications are shown in Figure LM5001. LM5005 can be applied to a large number of applications that can effectively reduce irregular high input voltage. This device is very suitable for telecommunications, industrial and automobile power bus voltage range.

High -voltage startup regulator

LM5005 contains the internal high -voltage startup regulator of the dual -mode, which is the PWM controller and the mOSFET door drive. This input pin (VIN) can be directly connected to the input voltage, up to 75 volts. Input voltage below 9VAt that time, A low -release switch directly connects VCC to VIN. In this supply range, VCC is about VIN. When the VIN voltage is greater than 9V, the low voltage difference switch is disabled, and the VCC regulator can keep VCC about 7V. By using this dual -mode regulator. The output current of the VCC regulator is limited to 20mA. After power -on, the regulator puts a capacitor connected to the VCC pin. When the voltage exceeds VCC UVLO threshold 6.3V and SD pins is greater than 1.225V, the output switch is enabled and the soft startup program begins. The output switch is kept by 1.125 volts when VCC is less than 5.3V or SD pins below 5.3V. The auxiliary power supply voltage can be applied to the VCC pin to reduce the IC power consumption. If the auxiliary voltage is greater than 7.3V, the internal regulator will be basically closed to reduce IC power consumption. VCC regulator stringing transistors, including VCC and VIN, should not have an forward deviation in normal operations. Therefore, the auxiliary VCC voltage must not exceed the VIN voltage. In high -voltage applications, special attention should be paid to ensuring that the VIN pins do not exceed the absolute maximum value rated voltage to 76V. During the line or load transient state, the ringtone on the voltage VIN line exceeds the absolute maximum value rated value that will damage the IC. Both circuit boards are carefully arranged and high -quality bypass containers are essential to approach VIN and GND pins.

Disclosure/spare

lm5005 contains a dual -level shutdown (SD) circuit. When the SD pin voltage is lower than 0.7V, the regulator is in a low -current shutdown mode. When the SD pin voltage is greater than 0.7V but less than 1.225V, the regulator is in the standby mode. In the standby mode, the VCC regulator is in a state of activity but the output switch is disabled. When the SD pin voltage exceeds 1.225V, the output switch is enabled and starts normally. The internal 5 μA pulled current source configures the regulator to open left in the SD pin. External settings from VIN to GND can be used to set the working input range of the regulator. The design of this division must ensure that the voltage at the SD pins is greater than 1.225V when the vehicle recognition number (VIN) is on the expected value. The internal 5 μA pull current source must be separated in the calculation of the external settings. Two stops include the lag and standby threshold of 0.1V. The voltage on the SD pin should not exceed 8V. When using an external setting point distributioner, you may need to clamp the SD pin to limit the voltage high input voltage conditions. The SD tube foot can also be used to achieve various remote control enable/disable functions. Pull UVLO to 0.7V threshold completely disable the controller. If the SD pin voltage is higher than 1.225V regulator.

The oscillator and synchronization function

The frequency of the LM5005 oscillator is connected between a single external device setting between the RT pin and the agng pin. RT resistor shouldYu Li's very close position and directly connect to the pin of IC (RT and the frequency of oscillator required (F) to set up, which can be used below:

synchronous pins can be used for synchronization. The internal oscillator to the external clock. The external clock must be a free running frequency RT resistor higher than the set. The clock circuit with a drain -opening output is a needle from the external clock to the synchronous recommendation interface. The duration of the clock pulse should be greater than 15ns.

By connecting the synchronous pipe foot together, multiple LM5005 devices can be synchronized. In this configuration, all equipment will Synchronous to the maximum frequency device. The chart in FIG. 5 illustrates the input/output characteristics of synchronous LM5005. The internal oscillator circuit is driven by a strong pull -off pipe foot/weak upper inverter. The cycle of the slope oscillator is terminated and a new oscillator cycle starts. Therefore, if the synchronous pipe foot of several LM5005 ICs is connected, the integrated circuit frequency of the highest internal clock will first connect the connected synchronization synchronization. The LM5005, which has the highest programming clock frequency of the oscillator of the oscillator of other ICs, will be used as the main control, and the control switch frequency of all oscillator frequency will be controlled

Error amplifier and pulse width modulation

Comparison

Internal high -gain error Player to generate error output voltage and internal precision benchmark (1.225V). Connecting users to provide the pin of the loop compensation component, usually the II network, as shown in Figure 1. This network generates a pole in the unit frequency, a zero and one noise reduction high -frequency pole. The PWM comparator comes from the slope of the slope. The compensation output voltage of the analog current signal generator to an error amplifier.

Slope generator

The slope signal used in the pulse width modulator used in the current mode control usually comes directly from the Buck switch Current. The switch current corresponds to the positive sloping rate of the output induction current. The use of this PWM slope signal simplifies the control loop transmission function as a single pole response and provides compensation for input voltage feedback. Because the front -edge parasitic of the circuit is filtered or covered. In addition, the current measurement may introduce significant communication delay. Filtering, blank time, and transmission delay limit the minimum pulse width that can be achieved. Larger, regulating requires a smaller pulse width and duty -occupying ratio. The LM5005 uses a unique slope generator actually does not measure the pressure reduction switching current, but the reconstruction signal. A slope signal, this signal does not have cutting -edge peaks and measurements, or filtering delay. The current reconstruction includes two yuanVegetarian: Sampling maintains DC levels and simulated current slope.

Sample and keep the DC level as shown in Figure 6. It is from the measurement of the diode anode current to the re -cycle. The cyclic diode anode should be connected to the IS pin. Diode current flows through the internal current detection resistor of the IS and PGND. The voltage level at both ends of the measurement resistance is sampled by the lower voltage switch before the next conduction interval starts. The diode current sensor and sampling u0026 amp; amp; keep the DC level that provides a reconstruction current signal. Positive diagonal inductance current slope is connected from a slope pin to an external capacitor internal voltage control current source of an external capacitor. Based on the following equal formula, the current source of the analog electrical sensor current is the function of VIN and VOUT voltage: IRAMP (5 μX (VIN -Vout))+25 μA slope capacitor depends on the selection value of the output sensor. The value of the cramp can be selected from the following options: CRUP L X 10-5, where L is the output sensor of Henry. The scale, the coefficient of this value simulation current slope is about equal to the proportional factor of DC level sampling and maintenance (0.5V/A). The clamping capacitor should be located at a very close to the device (slope and agng) that is directly connected to the integrated circuit pin.

For the duty occupation ratio of more than 50%, the current control circuit will be affected by the secondary resonance oscillation. Add a fixed slope voltage slope signal (slope compensation) to the current influenza signal to prevent this oscillation. The offset current provided from the simulation current source to the slope to add some fixed slopes from the shift current provided by the analog current. Working cyclic applications in some high places may require additional slope. In these applications, slope capacity can be reduced to increase slope compensation.

current limit

LM5005 contains a unique current monitoring solution for control and overcurrent protection. If the setting is correct, the analog current signal provides a proportional proportion to the buck switch current, and the proportional factor is 0.5 V/A. The simulation slope signal is applied to the current limit comparator. If an analog slope signal exceeds 1.75V (3.5A), the current cycle is terminated (cycle current limit). In the small output inductance and high input voltage switch current may be delayed due to the propagation of the current restricted comparator. If the diode current sampling circuit should occur, the excessive inductor current reduction switch is detected within the shutdown time. If the sampling and keeping the DC level exceed the 1.75V current limit threshold, the antihypertensive switch will be disabled and the pulse is skipped until the diode current sampling circuit detects that the inductor current has been attenuated to the current limit threshold. This method can prevent the current of the current due to delayed transmission or the saturation of the inductors, because the electrochemical current is forced to attenuate any current.

Soft start

Soft startup function allows the regulator to gradually reach, thereby reducing the initial operation point pressure and surge. Internal soft start current source, setSet to 10 μA, gradually increase the external soft startup capacitor to connect to the SS pin. Soft startup capacitor voltage is connected to an error amplifier. Various sorting and tracking schemes can use the voltage level of restrictions or clamping SS pins. If the failure is detected (the temperature is too high, the VCC soft startup capacitor will discharge. The failure no longer appears in the failure. The pressure switch and the associated floating high -voltage level shift/meter driver. This gate driver circuit works with the internal diode and an external self -lifting capacitor. Use the SW pin. At the rest time switch, the SW pin voltage is about -0.5V, and the self-raising capacitor raises the diode through the internal charging of the capacitor. When working at the high PWM duty cycle, the antihypertensive switch will Mandatory shutdown 500ns in each cycle to ensure that the capacitor is charged. Under a very light load conditions or when the output voltage is pre -charged, the switching voltage is turned off. At the same time, self -raising capacitors will not be able to receive sufficient voltage to operate the lower -voltage switch door drive. In these applications, the predictable pin can be connected to the software to pre -charged the self -raising capacitor. Internal pre -charged MOSFET and diode connection Between the PRE pins, the PGND starts the new conversion cycle of 250 NS before each cycle. If the SW pin is normal negatively voltage level (continuous conduction mode), there is no current flow over the pre -charged MOSFET/diode. [123 123 ]

Heat Protection

Internal heat shutdown circuits are used to protect integrated circuits when the highest temperature is exceeded. When activation, when it is 165 degrees Celsius, the controller will force the low -power reset state to disable Output drive and partial pressure regulator. This function can prevent catastrophic faults caused by overheating communication equipment

Application information

External components

The steps to calculate the external component are the following The design example of the surface is explained. The materials used in the design of the bill are shown in Table 1. The displayed circuit is configured in Figure 1:

Voltage 5V

vin 7V to 75V [ 123]

fs 300 kgen

Minimum load current (for CCM) 250 ma

Maximum load current 2.5a

R3 (RT) RT settings The oscillator switch frequency. Generally speaking, the higher frequency application is smaller, but the loss is higher. In this example, the 300kHz operation is used as a small size and high -efficiency reasonable compromise. The RT value of the 300kHz switching frequency is as follows: [ 123]

Select the most standard value of RT 21 k . The L1 inductor value isThe frequency, load current, ripple current, and maximum input voltage (minimum value), VIN (maximum value)) are based on the operating certainty.

Makes the circuit continuously connected mode (CCM). The maximum ripple current Iripple should be less than 2 times the minimum load current, or 0.5 AP-P. The values u200bu200bof this value ripple current, the value of the electrical sensor (L1):

This program provides a guide to select the L1 value. The closest standard value (33 μH) will be used. L1 must be rated with peak current (IPK+) to prevent saturation. Under normal load conditions, the peak current appears to the maximum load current plus the maximum ripple. Conditions during overload: peak current limits at 3.5A nominal values u200bu200b(maximum value of 4.25A). The saturated current rated value of the selected inductors (see Table 1) is 6.2 amp. For this manufacturer, the saturated rated value is defined at 20 ° C by 30%of the current. When C3 selects the electrical sensor value, the C3 value simulation slope circuit needs:

When L1 selects 33 μH, the recommended value of the C3 is 330pf. C9, C10 capacitors, and C19 output flat ripple currents and provide the loading conditions for the transient. This design uses 22 μF ceramic capacitors to select 150 μF SP organic electrical container. The CE RAMIC capacitor provides ultra -low ESR to reduce the ripple voltage and noise peak, and the SP capacitor provides a small volume of large voltage voltage voltage capacitors to meet the transition load conditions. The output approximate value ripple voltage is:

d1

Requires the application of a Schottky type diode LM5005. It is not recommended to use ultra -fast diode, and may damage IC recovery current due to reverse. Near the ideal reverse recovery, especially its characteristic and low -directional voltage drop high input voltage and the important diode characteristics of the low input voltage LM5005 common output voltage application. This recovery feature determines the reversal time when the BUCK switch is opened. The reverse recovery characteristic diode of Shitki enables the peak power in the buck to minimize the switch that occurs during each cycle connection period. Results The switching loss of the Buck switch was significantly reduced when the Syntky diode was used. The reverse failure level should choose the maximum vehicle identification number (VIN) and some security margin.

Positive voltage reduction conversion efficiency, especially for output voltage. The ""rated"" current and various manufacturers of the diode. The worst case is assuming the circuit load status. In this case, the diode will carry the output current almost continuous. The current of LM5005 can be as high as 3.5A. Suppose the worst case is that 1V decreases through the diode, and the largest diode power consumption can be as high as 3.5W. Reference design A 100V selected Schottky in the DPAK software package. C1, C2 regulator power supply voltage has large source impedanceIn the switch frequency. High -quality input capacitors need to limit the ripple voltage of the VIN pin to provide most of the switching current during the connection.

Application information (continued)

When the buck switch is turned on, the current of the input VIN pins steps into the lower peak of the electrocatator current waveform, rises to its peak, and then drops when closed. To zero. During the connection, the average current of the input VIN is the load current. The input capacitor should be selected as the RMS rated current and the minimum ripple voltage. One of the good ways of required ripple current rated is IRMS u0026 GT; IOUT/2. You should choose high -quality ceramic capacitors with lower ESR as input filters. Considering capacitor tolerances and voltage effects, two 2.2 μF, 100V ceramic capacitors will be used. If the transient of the step input voltage is expected to be close to the maximum rated value of the LM5005, carefully assess the ringing of the VIN pin and the possible peak value of the VIN pins should be complete. In these cases, the additional damping network or input voltage may need to use clamps.

Chapter 8

The capacitor on the VCC pin provides noise filtering and the stability of the VCC regulator. The recommended value of the C8 should not be less than 0.1 μF, and it should be good high quality, low ESR, ceramic capacitor. The value of 0.47μF is selected for this design.

Chapter 7

The guidance capacitor between BST and SW pins provides a gate current to open. The recommended value of C7 is 0.022 μF, and it should be a good quality, low ESR, ceramic capacitor. The capacitors on the fourth ingredient SS pin determine the soft start time, i, e. Reference voltage and output voltage time to reach the final specified value. Time has been set to the person:

For this application, the C4 value of 0.01 μF corresponds to a soft start time of 1 millisecond. R5, R6R5, and R6 set output voltage levels. The calculation formula for their ratio resistor is as follows: R5/R6 (voltage /1.225v) 1

123] For 5V output, the R5/R6 ratio is calculated as 3.082 as 3.082 Essence This resistor should choose a good starting point from the standard value resistor A. Choose within the range of 1.0 k -10 k . The value of R5 is 5.11 k , the value of R6 is 1.65 k R1, R2, and C12 can connect to the SD pins to set the minimum working voltage of the regulator VIN (min). If this function is necessary, the easiest way to select the value of the frequency divider resistor is used to select the value of R1 (between 10 k it is recommended to use 100 k ), and then calculate R2 based on the following formulas :

The capacitor C12 provides filtering for the frequency division. The voltage should be used as an external settingPoint allocation may need to clamp the SD pin under high input voltage conditions. The reference logo uses the full number of LM5005 (7V to 75V); therefore, these components can be omitted. In the case of SD pins, the circuit LM5005 is very satisfied with the VCC UVLO threshold response. R7, the buffer network on the C11 power diode reduces the peak of ringing at the exchange node. Excessive peaks of the ringtone may cause unstable operation and coupling peaks and output noise. Within the limit, the peak exceeds the rated value LM5005 or the recycling diode will damage these devices. It is the best way to choose the value of the buffer through the experience method. First, ensure that the length of the shock absorber connection is very short. The typical current level of the LM5005 A resistor is enough between 5 and 20 ohms. The result of adding value buffer capacitors is more damping, but more losses. Select a minimum value C11. This value provides damping the waveform of the SW pin under high load. The configuration error of the component of R4, C5, and C6 to place the gains of largeifiers to achieve a stable overall loop gain. The advantage of the one -current mode control is that it can close the circuit with only two feedback elements, R4 and C5. This total loop gain is the gain and error amplifier gain of the modulator. The LM5005 DC modulator gain is as follows: DC gain (MOD) GM (MOD) x RLOAD 2xrload modulator The main low -frequency pole point is determined by the load resistance (RLOAD) and the output capacity. The frequency of this pole rotation is: fp (MOD) 1/(2πr load COUT) For RLOAD 5 and Cout 177μF, then FP (MOD) 180Hz DC gain (MOD) 2 x 5 10 10 20 DB For the design examples of Figure 1, the measurement of the following regulator gain and frequency characteristics is shown in Figure 8. The component R4 and C5 configure the error amplifier to configure it. There is a pole in the unit, in FZ 1/(2πr4C5). The error placing the large device to offset the modulation pole to the cross frequency of the ring gain at the cross frequency of the loop. A very stable loop is generated at the cross frequency, and the phase margin is 90. For design examples, the target ring bandwidth (cross frequency) is 20 kHz. Compensation network work zero (FZ) should choose at least a magnitude of a magnificent Mag Nitude. This will cause the expected compensation network (1/(2πr4 C5) of the R4 and C5 to produce the expected compensation network (1/(2πr4 C5). When the increase of R4 decreases C5 in proportion, the error increases the amplifier. On the contrary, the R4 increases C5 by proportion, decrease Small error amplifier gain. In order to design a 0.01 μF example C5 and R4 for 49.9 k these values u200bu200bare configured with zero compensation network work when 320 Hz. (20db). The entire cycle can predict the gain and error amplifier gain of the modulation. If the network analyzer is available, the modulator gain can be measured and an error amplifier gain can be configured as the expected loop transmission function. If the network analyzer does not have an error error amplifier compensator compensation element designed in accordance with the guidance polls given. Step loading transients can be tested to verify acceptable performance. The goal of the jump load is the minimum over pumping and damping response. C6 can be added to the compensation network to reduce the noise sensitivity of the error amplifier. The value of the values u200bu200bC6 must be small enough, because the capacitor adds a pole to the error amplifier transmission function. This pole must far exceed the cross frequency of the ring. A good approximation of the C6 plus pole point is: FP2 FZ X C5/C6. Another reduced error amplifier noise sensitivity is to connect a capacitor Application information (continued) from a COMP pin to Agnd pins. When using this, the method of electricity should not exceed 100pf. Reduce the lower voltage regulator of the bias power consumption under high input voltage can provide considerable power for the bias of IC. The VCC regulator must lower the input voltage VIN to 7V to the A nominal VCC level. The VCC regulator is converted into a high -power loss VCC regulator internally. Several technologies can significantly reduce the power consumption of this polarizer regulator. Figure 11 and 12 describe two types of IC deviation from the output voltage. In each case, the internal VCC regulator is used for the initial bias VCC pin. After the output voltage is established, the VCC pin potential is increased to the nominal 7V adjustment level, thereby effectively disable the internal VCC regulator. The voltage on the VCC pin should not exceed 14V. The VCC voltage must not be greater than 14V than the vehicle recognition number voltage. Application information (continued) PWB board layout and heat Considering the circuit in the items diagram 1 is both LM5005 and for LM5005 Essence Two circuit currents in the antihypertensive regulator conversion is fast. The first cycle from the input capacitor, to the regulator VIN pin, until the SW pin of the regulator, to the inductor and then output to the load. The second loop is from the output capacitor ground to the regulator PGND pins, to the regulator is a pins, to the diode anode, and then output the electrical sensor to the load. The area of u200bu200bthe two circuits of the minimized cycle reduces the sensory inductance and minimize the noise and possible unstable operation. The grounding suggestion is recommended to install the input filter capacitor to the PGND pins of the output filter capacitor and regulator on the PC board. Connect all low -power grounding connections (CSS, RT, CRAP) directly to the regulator Agnd pins. The copper area connecting Agnd and PGND pins through the copper area of u200bu200bthe platform covers the bottom of the entire device. Put a few copper on the ground floor floor belowarea.Two components with the highest power consumption are the recycling diode and the LM5005 regulator IC.The easiest way to determine the LM5005 used to measure the total conversion loss (pin-and then minus the power loss of the Schottky diode, the output inductor and the buffer resistance.X VFWD. The approximation of the power of the output induction sensor is p iOUT2 X RX 1.1, where R is the DC resistance of the inductor, and the 1.1 coefficient is the approximate value of the AC loss.The voltage drops, use the oscilloscope to estimate the power lo