Features

■ 5V ± 4%, 500mA output voltage

■ Control function compatible with μP. )

■ Low static current (7mA@500MA)

■ Low noise, low drift

■ Low -current sleep mode (IQ 250 μA)

■ Failure protection

-The hot shutdown

-Shamournation

-60V peak transient state

-Plotic

Explanation

[

[

[

[

[

123] CS8140 is a 5V door dog regulator with a protective circuit and three logical control functions, allowing microprocessors to control its power supply. The CS8140 is designed for automobiles, switching power supply, rear rear regulator and battery power supply system.

The basic performance characteristics of the pressure regulator include low noise, low drift, 5V ± 4%accurate output voltage, low voltage drop (1.25V@iout 500mA) and low static current (7mA@ioT 500MA) Essence Short -circuit, thermal protection and overvoltage protection on the board make it possible to use the regulator in a particularly harsh working environment.

Look at the input signal (WDI) of the Dog logic function monitoring from the microprocessor or other signal sources. When the signal frequency exceeds the limits of the external programming window, a signal () is generated. CDLAY (CDLAY) restrictions on the Win Dow Dow Dog Win DOW and the Po -Reset (POR) and delay. That function is activated by one of the following three situations: the door dog signal exceeds its preset limit; the output voltage exceeds 4.5%of the adjustment range; or IC is in the order of power. The signal has nothing to do with the vehicle identification number (VIN), and the reliability is low to VOUT 1V.

The enlightenment function controls the power consumption of the regulator with the watchdog. The output stage and its accompanying circuit of the CS8140 are enabled by setting the enabled lead to be set to high level. When the Limits (Low Limits), the Low (lead) signal enters Low Limits (Low Limits), Low (lead) regulator enters Low Limits (starting the outer window regulator) mode. The unique combination of the control function in the CS8140 enables the microprocessor to control its own power -off order: that is, it enables the microprocessor to flexibly perform the management function before power off.

CS8141 has the same functions as CS8140, but CS8141 only responds to input signals (WDI) with a response below the preset door dog frequency threshold.

square figure

Typical performance features

The term definition

Falling voltage

Input output voltage difference, when the input voltage further further further When the circuit is reduced, the circuit is stopped. When the nominal value of the output voltage drops 100 millivolves when the nominal value is input from 14V, the voltage falls depends on the load current and knot temperature.

Input voltage

The input terminal relative to the DC voltage of the ground.

Wiring adjustment

The output voltage changes when the input voltage changes. The measurement is performed under low power consumption conditions, or the pulse technology is used to make the average chip temperature from significantly affect.

Load adjustment

At the temperature of the constant chip, the output voltage caused by changes in the load current.

Static current

The part of the positive load current does not generate in the input current. The regulator ground wire current.

Circuit ripple suppression

The ratio of the peak input ripple voltage to the peak output ripple voltage.

current limit

The peak current that can be transmitted to the output end.

Circuit description

Voltage benchmark and output circuit

Precision voltage benchmark

The adjustment of the output voltage depends on the precise band gap benchmark voltage in the integrated circuit. By adding an error amplifier in the feedback circuit, the output voltage remains within -4%within the range of temperature and power change.

Output level

The output structure of the composite PNP-NPN (Figure 1) provides a 500mA (minimum) output current, while maintaining a lower voltage drop (1.25V) and a small static current current (7mA).

NPN streaming devices prevent deep saturation of the output level, which in turn improves the efficiency of IC by preventing excessive current use and dissipation of IC.

Output level protection

The output stage is protected by overvoltage, short circuit and thermal outlet (Figure 2).

If the input voltage rises to more than 30V (for example, the load is dumped), the output is closed. This response protects the internal circuit and enables IC to withstand the accidental voltage.

Using the emitting pole induction scheme, the current volume of the NPN -mounted transistor is monitored. The feedback circuit ensures that the output current will not exceed the preset limit.

If the knot temperature of the power device exceeds 180 ° C. Because the power transistor is the main heat source of the integrated circuit, the heat clearance is an effective means to prevent the chip from overheating.

regulator control function

CS8140 Different from all other linear regulators in its unique combination control function.

Look at the door dog and enable function

VOUT controlled by logic function enable and watchdog (Table 1).

Figure 3: The timing chart of the door dog and enable function

3A: Vout should be kept at high and enabled high.

3B: VOUT should be kept at low and enabled high.

3C: Vout When the door dog is too slow and enable high.

3D: Vout as the door dog is too fast and enabled high.

3E: WDI remains at a high level after normal operation; enable low.

3F: WDI keeps low or too slow after normal operation; enable low.

3G: WDI frequency rose to the upper limit of frequency after a period of normal operation; enable low (only suitable for CS8140).

As long as ENable is high or enable and the door dog signal is normal, VOUT will be 5V (typical value). If Enable (enabled) is low and the door dog signal exceeds programmable restrictions, the output transistor is turned off and IC enters the dormant mode. Only the enable circuit in IC is kept power -on, and the static current is 250 A.

Look at the frequency of the WDI signal input in the door. If the signal falls outside the WDI window, the frequency of the vein can be generated at the reset wire (Figure 3) until the correct viewing dog input signal (enable high) at the wire.

The lower limit and the upper limit of the window threshold of the door of the dog function are set by the value of CDlay. According to the following prescriptions of CS8140, the limit value:

For CS8141, the lower limit is determined by the equation in the above (A).

CDLAY can also determine the frequency of the reset signal and the post -power -power reset (POR) delay time.

Reset reset function

When the door dog signal exceeds its preset window (Figure 3), the regulator is in power-powered (Figure 4A) or when VOUT drops to Vout-4.5 When %exceed 2 μs (Figure 4B), the function is activated.

If the door dog signal exceeds the preset voltage and frequency window, the frequency programmable pulse can be generated at the leaderString (Figure 3) until the correct viewing dog input signal appears on the lead. The pulse duration is determined by CDLAY according to the following equations:

The reset circuit waveform is displayed

If there is owed existence For pressure, the voltage on the resetting wire is low, and the delay capacitor CDlay discharge. Keep the low level until the output is adjusted, the voltage on the CDlay exceeds the upper limit of the switch threshold, and the door dog input signal is within the window limit of its settings (Figure 4). The delay after the output adjustment is:

The delay circuit is also covered with CDLAY programming.

The output of the reset circuit is NPN. To avoid delay, the operation delay of the comparator is controlled by delay.

Application Instructions

CS8140 Design Example

CS8140 with its unique integrated linear regulator and control function: enable and watch dogs, providing a microprocessor power supply provides the power supply power supply supply. A single IC solution. The limits of reset latency, reset duration and the frequency of seeing dogs are determined by a single capacitor. For a specific microprocessor, the most important requirement is usually reset latency (also known as the power -on reset). The choice of capacitors meets this requirement, and the duration of the reset and the frequency of watching the door also change.

Reset latency is given by the following formulas:

It must be assumed that the minimum latency is 200ms.

According to the CS8140 data table, due to the regulator, the reset latency has ± 37%tolerance.

Assume that the capacitor tolerance is ± 10%.

The closest standard value is 0.82μF.

The minimum and maximum delay of 0.82μF were 220ms and 586ms.

Application Notice

The duration of the reset pulse is given by the following formulas:

Due to the IC, the tolerance is ± 50%, the capacitance, the capacitance The tolerance is ± 10%.

The duration of the reset pulse is from 3.69ms to 13.5ms.

Looking at the dog signal can be represented by frequency or time. From the perspective of programmers, time is more useful, because they must ensure that a dog signal sends out several times per second.

The maximum and smallest goal dog time is given by the following formulas:

Due to CS8140, the tolerance is ± 20%.

The capacitor tolerance is ± 10%:

You must write the software so that the door dog signal is reached at least every 76 milliseconds. But it is not as faster than every 41 milliseconds (Figure 5).

CS8141 is the same as CS8140, but the designer who uses the lower threshold value of CS8141 to see the lower threshold value uses this part Essence

Energy -saving and intelligent functions

Energy -saving is another benefit of using integrated microprocessor control functions. With the CS8140 or CS8141 shown in FIG. 8, the microprocessor can control the order of power off. The instantaneous contact switch quickly charges C1 to R1.

When the voltage on the C1 reaches 3.95V (enabled threshold), the output is connected and VOUT rises to 5V. After the delay time determined by CDlay, generate frequency programmable reset pulse string at the reset output. The pulse sequence continues until the correct watch dog signal appears on the WDI wire. C1 is now discharged by the input impedance (about 150k ‰) of the enable wire, so that the capacity signal disappears. As long as the CS8140 continues to receive the correct viewing dog signal, the output voltage remains at 5V.

The microprocessor can turn off its power by termination of its watch dog signal. When the microprocessor completes its interior processing or shutdown software program, it stops sending the door dog signal. As a response, the regulator generates a reset signal and enters the dormant mode. At this time, the VOUT drops to 0V to turn off the microprocessor.

Stability Consider

FIG. 7 The output or compensation capacitance C2 helps to determine the three main features of the linear regulator: start delay, load transient response, and circuit stability.

The value and type of capacitor should be based on cost, availability, size and temperature limit.容 or aluminum electrolytic capacitors are the best, because almost zero -zero film or ceramic capacitors can cause unstable. Aluminum electrolytic capacitors are the cheapest solutions, but if the circuit works at low temperature (-25 ° C to -40 ° C), the value of the capacitor and ESR will change greatly. The data table of capacitor manufacturers usually provides this information.

The value of the output capacitor C2 in FIG. 7 should apply to most applications, but it is not necessarily an optimized solution.

In order to determine the acceptable value of the specific application, start with the recommended value container with the recommended value, and then find cheaper alternative components.

Step 1: Place the complete circuit with a recommended value container in the ambient room where the working temperature is at least prescribed, and monitor the output with a oscilloscope. The ten -to -be -in box connected to the capacitor will simulate the higher ESR of aluminum capacitorsEssence Putting the decadence box outside the test box, the small resistance increased by the longer wire can be ignored.

Step 2: When the input voltage reaches the maximum value, slowly increases the load current from zero to full load, and at the same time observe whether the output is any oscillation. If the oscillating is not observed, the capacitor is large enough to ensure the stable design under steady condition.

Application Relationship Figure

Step 3: Use the decimal box to increase the ESR of the capacitor from scratch and change the load current until A oscillating. Records cause maximum oscillating load current and ESR values. This means the worst case of the regulator at low temperature.

Step 4: Maintain the worst case load conditions set in step 3, and change the input voltage until the oscillation increases. This point represents the input voltage conditions in the worst case.

Step 5: If the capacitor is sufficient, repeat steps 3 and 4 for the next smaller capacitor. Smaller capacitors usually cost lower, and there are fewer board spaces. If the output is oscillated within the expected working conditions, the next larger standard capacitance value is repeated step 3 and 4.

Step 6: Test the transient response of the load by switching the load of different frequencies to simulate its real working environment. Change ESR to reduce ringing.

Step 7: Take the device from the environment room and heat the IC with a hot air gun. Change the load current according to the instructions in step 5 to test whether there is any oscillation.

Once found to have the minimum capacitor value of the maximum ESR, the safety factor should be added to consider any changes in the capacitance and the performance of the regulator. The tolerance of most high-quality aluminum electrolytic capacitors is +/- 20%, so the minimum value discovered should be increased by at least 50%to allow the tolerance to add changes at low temperatures. The ESR of the capacitor should be less than 50%of the maximum allowed ESR in the above step 3.

The power consumption calculation of a single output linear regulator

The maximum power consumption of a single output regulator (Figure 9) is:

] Among them: VIN (MAX) is the maximum input voltage, VOUT (min) is the minimum output voltage, IOUT (MAX) is the maximum output current applied, and IQ is the static current (MAX) consumed by the regulator when IOUT.

Once the value of PD (MAX) is known, you can calculate the maximum allowable value of RQJA:

RQJA's of RQJA The value can be compared with the value in the packaging part of the data table. The packaging of the calculated value in RQJA is less than the calculation value in the formula 2 will keep the mold temperature below 150 ° C.

In some cases, any packaging is not enough to heat dissipate IC productionThe heat of raw, so it requires external heat sinks.

The radiator

The heat sink effectively increases the surface area of the packaging to improve the heat flow from integrated circuits to surrounding air.

Each material in the heat flow between IC and the external environment will have a thermal resistance.Like the series resistance, these resistors are added to determine the value of RQJA:

where: RQJC knot-shell heat resistance, the heat resistance from RQCS shell to the radiator,And the heat resistance of the RQSA radiator to the environment. RQJC appears in the package part of the data table.Like RQJA, it is also a function of a package type.RQCS and RQSA are functions of encapsulation types, radiator and interfaces between them.