Features

Direct path #8482;

- Eliminate the pop -up/click sound

- Eliminate the output DC blocking capacitor

- Provide a flat frequency response of 20 Hz -20 KHz

low noise and THD

-Sto signal ratio gt; 109 db

- Typical vn lt; 7 μvms

–Thd+n lt; 0.002%

Input the output voltage of 2.5-kΩ load

–2 vRMS, 3.3-v power supply voltage

[

[ 123] -3 VRMS, 5 V power supply voltage

Differential input

Expossed voltage mute

#8226; PDP/LCD TV

Blu -ray CD #8482;, DVD player

Home Theater

Explanation

DRV603pw

is a 3-VRMS non-pop-up stereo line drive. The design allows removal of the output DC blocking capacitor to reduce the number and cost of the component. This device is very suitable for single -power electronic products with key design parameters. The DirectPath design #8482; V5-V driver voltage with V5Ω technology is V5.5 V. This device has differential inputs, and uses an external gain setting the resistor to support the gain range of ± 1 V/V to ± 10 V/V, and line output with ± 8 kV IEC ESD protection. DRV603 (occasionally known as #39; 603) has built -in shutdown control and is used to no switch control. DRV603 has an external and internal pressure detector that can make the output mute.

Compared with the traditional method of generating 3-VRMS output, the use of DRV603 in audio products can greatly reduce the number of components. DRV603 does not require a power supply greater than 5 V to generate 8.5-VPP output, nor does it need to be railled. DRV603 integrates its own charge pump to generate a negative power rail and provide a clean, non-pop-up ground bias 3-VRMS output.

DRV603 provides 14 stitches TSSOP.

If low noise and fine -tuning DC offset and external underwriting mute function are not good in the application, TIs are recommended to use DRV602 compatible with packaging shape.

Figure Figure

Typical features

vdd 3.3 V, TA 25 ° C, RL 2.5 k , C (pump) c (vss) 1 μF, CIN 10 μF, RIN 10 k , RFB 20 k (unless otherwise explained).

Application information Line driver amplifier

Single -electric source line driver amplifier is usually usually common Need to block the capacitor. The above figure in FIG. 11 illustrates the connection of the traditional line drive amplifier to the load and output signals.

The value of the DC closed lock capacitor is usually very large. In the process of power, a quiet circuit is required to minimize the clicks and banging sounds as much as possible. Output capacitors and mute circuits consume PCB area, increase assembly costs, and reduce the preservation of audio output signals.

Direct path #8482; but from a single power supply provides an internal structure of a negative charger.

Combined with the positive track provided by the user and the negative IC, the equipment runs in an effective division mode.

The output voltage is now concentrated in zero, which can swing to the right or negative. Combining the built -in click to reduce the circuit, DirectPath #8482; the amplifier does not need to output DC blocking capacitors.

The bottom box diagram and waveform of FIG. 11 illustrates the ground reference line driver architecture. This is the architecture of DRV603.

The charge pump flight capacitor and PVSS capacitor

In the process of generating negative charge, the charge was transferred to the capacitor. PVSS capacitors must be at least equal to the charge pump capacitor to allow maximum charge transfer. Low ESR capacitor is an ideal choice, and 1 μF is a typical value. The capacitance value of less than 1 μF can be used, but the maximum output voltage may be reduced, and the device may not be able to run according to specifications.

Define capacitor

DRV603 is a direct path #8482; line driver amplifier requires enough power to be coupled to ensure that noise and total harmonic distortion (THD) are low. A good low -equate series resistance (ESR) ceramic capacitor is usually 1 μF, placed at the place where the VDD lead is as close to the device, and the effect is the best. Putting this off -coupled container near DRV603 is important for the performance of the amplifier. In order to filter a low -frequency noise signal, placing a 10μF or larger capacitor near the audio power amplifier will also help, but it does not need it in most applications, because the PSR of this device is PSRR is high.

Increase setting resistance range

Must be selected to set the resistor RIN and RFB to keep the noise, stability, and input capacitor size of the DRV603 within the acceptable range. The voltage gain is defined as RFB divided by Rin.

The value of too low input requires a large input AC coupling capacitor, CIN. Choosing a high value will increase the noise of the amplifier. Table 1 lists the recommended resistance value of different gain settings.

Input the lock -lock capacitor

The input terminal of the V603 series needs to add a capacitor at the DC input terminal. These capacitors block the DC parts of the audio source and allow DRV603 to input appropriate bias to provide maximum performance.

These capacitors and input resistance RIN form high -pass filter. The deadline is calculated with Formula 1. For this calculation, the capacitor used is input blocking capacitors, and the resistance is the input resistance selected from Table 1. When one of the two values is given, the frequency and/or capacitance can be determined.

Use DRV603 as a second -order filter

Some audio DACs currently used requires an external low -pass filter to eliminate external noise. This is a possible DRV603 because it can be used like a standard operating amplifier. It can achieve several filter topology, including single -end and differential. In FIG. 13, multiple feedback (MFB) with differential input and single -end input is displayed.

The figure shows an AC coupling capacitor to remove the DC component from the source; it is used to prevent any DC component in the source and reduce the DC gain to 1, which helps the output DC bias Move to minimize.

The resistance value should have a low value to get low noise, but it should also have sufficient high value to obtain a small -sized AC coupling capacitor. Use 5.6kΩ resistors, C1 220pf, C2 470pf, 10 μF input AC coupling convergence container can achieve 112DB DNR.

No pop -up power supply

During the rise and decrease of the power supply, by keeping the SD (shutdown pin) at a low level, it is ensured that there is no pop -up power supply. The SD pin should be kept at a low level until the input AC coupling convergence container is fully charged, and then asserted that the SD pin is high to achieve non -pop -up power. Figure 14 illustrates the priority.

External pressure detection

External underwriting detection can be used to make DRV603 mute/close before the input device is generated.

The shutdown threshold at the UVP pin was 1.25 V. The user selects a resistor division to obtain the shutdown threshold and lag of specific applications. ThresholdTo determine the following:

VUVP 1.25 V × (R11 + R12) / R12

Hysterersis 5 μA × R13 × (R11 + R12) / R12

The condition is the condition is the condition is the condition is the condition is the condition is the condition is the condition is the condition is the condition is the condition.R13 gt; gt; r11 // r12.

For example, you need to get VUVP 5 V and 1-V lag, R11 3 K , R12 1 K , R13 50 K

Capacity load

DRV603 can directly drive up to 220 PF high -capacity loads.By adding a 47 or a larger series resistor, you can accept a higher capacitance load.

The gain setting resistor

The gain setting the resistor RIN and RFB must be close to the input pin, minimize the capacitor load on these input pins, and ensure the maximum stability of the DRV603.For PCB layouts, see the DRV603EVM user guide (SLOU248).

Application circuit

R1 5.6 K , R2 5.6 K , R3 5.6 K PF, C2 470 PF

Differential input, single -end output, second -order filter