Features

Unit's stable bandwidth: 1.5GHz

2v/v Banded high gain: 690MHz

Low power current: 5.8ma

High conversion rate: 1700V/μs

High -full power bandwidth: 675MHz

low Differential gain/phase: 0.03%/0.015 °

Lead-free green SOT23-5 packaging

Broadband video line drive [123 123 ]

matrix switch buffer

Differential receiver

ADC drive

improved OPA658; Alternative

Explanation

OPA694 is a ultra -broadband, low power consumption, current feedback computing amplifier, with high conversion rate and low difference in gain/phase error. The improved output level provides ± 80mA output drive, and the output voltage balance lt; 1.5V. gt; low power current with 500MHz bandwidth meets the requirements of high -density video routers. As a current feedback design, OPA694 can maintain a very high gain under the condition of 10, and OPA694 can still provide 200MHz bandwidth.

RF application can use OPA694 as a low -power sound surface wave ahead. Compared with many typical radio frequency amplifiers, 70MHz provides extremely high three -order interception with lower static power.

OPA694 has industrial standard pins in SO-8 and SOT23-5 packaging.

Typical features: vs u003d ± 5V

rf u003d 402Ω, RL u003d 100Ω, G u003d+2V/v, unless there is another other illustrate.

Application information Broadband current feedback operation OPA694 provides excellent AC performance for broadband, low power consumption, and current feedback computing amplifier. Only a static current of 5.8mA, OPA694 provides a 690MHz bandwidth, the gain is +2, and the conversion rate of 1700V/ms. Improved output level provides ± 80mA output drive, and LT; 1.5V output voltage balance. This combination of low power consumption and high bandwidth is conducive to high -resolution video applications.

FIG. 31 shows DC coupling +2 gain dual -power circuit configuration for the basic characteristic curve. For the purpose of testing, the input impedance settings are 50Ω, the resistance is connected, the output impedance is set to 50Ω, and the series output resistance is set to 50Ω. The voltage fluctuations reported in the electrical characteristics are directly measured at the input and output pins, and the load power (DBM) is defined under the matching 50Ω load. For the circuit in FIG. 31, the total effective load is 100Ω | | 804Ω u003d 89Ω. Figure 31 contains an optional component. In addition to the usual power supply container, the two power pins also include a 0.1MF capacitor. In the actual printing circuit board (PCB) layout, this optional additional capacitor usually increases the two -dB of 2 -time decibels to 6 decibels.

FIG. 32 shows the basis of 2V/V DC coupling dual -power supply circuit as the basis of the typical characteristic curve. Reverse operations provide several performance advantages. Because there is no co -mode signal at the input level, the conversion rate of the inverter operation is higher, and the distortion performance is slightly improved. Figure 32 includes an additional input resistance RT for 50Ω input impedance to 50Ω. The parallel combination of RT and RG sets input impedance. The non -reversible and inverse applications in Figure 31 and Figure 32 will benefit from the optimization of the bandwidth feedback resistor (RF) value (see setting the resistance value to optimize the discussion in the bandwidth part). The typical design sequence is to select the radio frequency value for the best bandwidth, set RG for the gain, and then set RT for the required input impedance. When the gain of the reverse configuration increases, RG will reach the point of 50Ω. At this time, RT will be removed, and the input match will be input only by RG. When RG is fixed to achieve the input matching to 50Ω, RF is simply increased to increase gain. However, this will rapidly reduce the possible bandwidth, such as the reversal gain of the -10 frequency response in the typical feature curve. For gain gt; 10V/V (14DB under the matching load), it is recommended not to reverse the operation to maintain wider bandwidth.

ADC driver

Most modern high -performance modulus converters (ADC) requires low noise and low -disturbed drive. OPA694 combines low -voltage noise (2.1NV/√Hz) and low harmonic distortion. For examples of broadband, AC coupling, and 12 -bit ADC drive, see Figure 33.

The circuit in FIG. 33 uses two OPA694 to form a 12 -bit ADC differential drive. Two OPA694S provides a bandwidth of gt; 250MHz, the differential gain is 5V/V, and the output width is 2VPP. The second -order RLC filter is used to limit the noise of the amplifier and provide a certain attenuation for high -frequency harmonic distortion.

Broadband inverter and amplifier

Because the signal bandwidth of the current feedback computing amplifier can be controlled by noise gain (NG, which is usually the same as the non -inverted signal gain), it can be used to use OPA694 to achieve broadband Revelation and level. The circuit in FIG. 34 shows an example of reverse and amplifier, where the resistance value has been adjusted to maintain the maximum bandwidth and input impedance matching. If each RF signal is driven by a 50Ω source, the NG of the circuit is [1+100Ω/(100Ω/5)] u003d 6. Total feedback impedance (from VO to reverse error current) is the harmony of RF+(RI ng). Among them, RI impedance refers to the impedance of the input of the inverter (see ""Set resistance to optimization performance"" 1 Festival). Use 100Ω feedback (from each input to the output pin to obtain -2 signal gain) needs to enter the additional 30Ω with the inverter input to increase the feedback impedance. When this resistance is added to the typical internal RI u003d 30Ω, the total feedback impedance is 100Ω+(60Ω 6) u003d 460Ω, which is equivalent to the value required to obtain the maximum bandwidth flat frequency response when ng u003d 6.

Speed u200bu200bsurface wave filter buffer

A common requirement of the intermediate frequency band is to use sufficient gain buffer mixed frequency output to so as to Restore the insertion loss of the narrowband SAW filter. FIG. 35 shows a possible configuration filter typical characteristic curve showing a dual -tone three -order interlocking distance diagram (Figure 14). This circuit works under the inverter mode with a voltage gain of -8V/V. Use the gain setting the resistor to provide a 50Ω input matching, with feedback for optimization for maximum bandwidth (in this example), and pass the 50Ω output resistance through the 50Ω output resistance Enter the matching network at the input end of the SAW filter. If the insertion loss of the sound surface wave filter is 12DB, in the pitch band of the sound surface wave (SAW) filter, it will be loaded to 50Ω (probably the input impedance of the next medium -frequency platter or a mixer) to provide a net of 0DB net. Gain. In this application, the OPA694 is used to isolate the impedance of the first blender and the SAW filter, and provides a very low dual -tone and third -order bandard level in the SAW filter bandwidth.

Increase the flat -band unit gain buffer

FIG. 31 The peak of the units of the unit gain buffer configuration of the display frequency response exceeds 2DB. In this slight pulse response curve, there is an obvious+1V pulse response. Figure 36 shows a similar circuit, which has a flat frequency response, which improves the pulse preparation.

The circuit eliminates the peak by self -reliance to eliminate any parasitic effect on RG. Because RG's vision is very high in impedance, the input impedance is still set by RM. RM may increase to display higher input impedance, but the larger value willStart affecting DC output offset voltage. This circuit generates an additional input bias voltage, which is used as a difference between the two input bias currents. Figure 37 shows comparison comparison of the number of small signal frequency responses of unit gain. The buffer of Figure 31 is compared with the improvement method shown in Figure 36. Any method provides a low -power unit gain buffer, which is greater than 1.56GHz.

Design tool

Demonstration fixed device Two print circuit boards (PCB) can be used to assist OPA694 in it. The circuit performance was preliminarily evaluated in the two packaging options. Both products are free offered polychloribobenes provided free of charge, and they are attached with user guides. The summary information of these fixed devices is shown in Table 1.

Calculating the demonstration device on the website of Texas Instrument Company through OPA694 product folder.

Macro model and application support

When analyzing the performance of the simulation circuit and system, it is very useful to use SPICE to simulate the computer performance. This is especially true for video and RF amplifier circuits, because parasitic capacitors and inductors will have a significant impact on circuit performance. OPA694's SPICE model can be obtained through the Ti website (website). These models can well predict small signal communication and transient performance under various operating conditions. They do not do well in predicting harmonic distortion or DG/DF characteristics. These models do not try to distinguish the packaging type in their small signal communication performance.

Operation suggestion

Set the resistance value to optimize the bandwidth

current feedback computing amplifier like OPA694 can maintain the almost constant signal gain bandwidth by adjusting the external resistance value appropriately. This is displayed in the typical characteristic curve; the small signal bandwidth is slightly decreased with the increase of gain. These curves also show that the feedback resistance has changed each gain settings. The resistance value of the current feedback computing amplifier circuit can be regarded as a frequency response compensation element, while their ratio sets the signal gain. Figure 38 shows the analysis circuit of the small signal frequency in OPA694.

The key element of this current feedback of the op amp modeling is:

a → buffer gain from non -turning input to reversal input

Ri → buffer output impedance

IERR → feedback error current signal

z (s) → frequency correlation, from IERR to VO's open -loop cross -resistance gain

[123 ] Cushioner gain is usually very close to 1.00, and is usually ignored from the signal gain consideration. However, it will distribute the bulk device for a single transportation differenceConfigure CMRR.

For buffer gain A LT; 1.0, CMRR u003d --20 × Log (1 – A) DB.

The output impedance RI of the buffer is a key part of the bandwidth control equation. OPA694's RI is usually about 30Ω.

The current feedback operational amplifier sensor sensor's error current (opposite to the difference in input error voltage of the voltage feedback computing amplifier) u200bu200bis passed to the output terminal through a transmissile gain related to the internal frequency. Typical features indicate such an open -loop cross -block response. This is similar to the opening voltage gain curve of the voltage feedback op amp. Development Figure 38 Circuit's transmission function to get the square type 1:

in the formula:

Written by the analysis format of the ring road, the error caused by the non -limited opening of the ring gain is expressed by the denominator. If Z (S) is infinitely frequent, the denominator of equation 1 will be reduced to 1, and the ideal expectation signal gain displayed in the molecule will be obtained. The score in Formula 1 denim determines the frequency response. Formula 2 is displayed as a circuit gain equation:

If 20 × log (RF+NG × RI) is drawn at the top of the opening of the ring, the difference between the two Value is the loop gain at a given frequency. In the end, Z (s) will roll to the denominator of equivalent equation 2. At this time, the circulation gain is reduced to 1 (curve intersection). The closed frequency response of the amplifier given by the equal form 1 starts attenuation, which is exactly similar to the frequency of the noise gain of the voltage feedback computing amplifier equal to the opening voltage gain. The difference here is that the total impedance in the equivalent 2 denim can be slightly controlled by the expected signal gain (or NG).

OPA694 After internal compensation, at the NG u003d 2 of the ± 5V power, the maximum flat frequency response of the RF u003d 402Ω. Calculating Formula 2's denominator (ie, feedback) to get the best goal of 462Ω. With the change of signal gain, the contribution of NG × RI items in feedback mutual impedance will also change, but it can keep it unchanged by adjusting RF. Formula 3 gives the approximate equation of the best radio frequency signal gain:

As the expected signal gain increase, this equation will eventually predict a negative RF. The RG value can also maintain a subjective limit of 20Ω to a certain extent. The lower value will load the buffer level in the input level and output level. If the RF is too low, it will actually reduce the bandwidth. Figure 39 shows the recommendation of ± 5V operations RF and NG. The value of RF and GAIN displayed here is about the value of the value of typical values. The difference between them is that the optimization value used in typical features also corrects the board parasites that have not been considered in simplified analysis, so as to get equation 2. Give a good in 39The starting point of design.

The total impedance of entering the inverter input can be used to adjust the closed -loop signal bandwidth. Inserting a series resistance between the inverter input and the pursuit and the knot will increase the feedback impedance (the denominator of Formula 1), thereby reducing the bandwidth. This bandwidth control method is used for the inverter and circuit on the homepage. OPA694's internal buffer output impedance is very small, and the source impedance is viewed out of the non -reversing input terminal. High source resistance will increase RI and reduce bandwidth.

Output current and voltage

OPA694's output voltage and current capacity are usually not in the broadband amplifier. Under the air load conditions of+25 ° C, the output voltage is usually less than 1.2V compared to any power rail; the swing of+25 ° C is limited to the 1.2V range of any power rail. In the 15Ω load (minimum test load), the output current is greater than ± 60mA.

Although the above specifications are familiar with the industry, voltage and current restrictions are considered. In many applications, it is (voltage × current) or V-i multiplication, which is more related to the circuit operation. Refer to the output voltage and current limit diagram in typical features (Figure 21). The X and Y axis of this figure show the zero voltage output current limit and zero current output voltage limit, respectively. The four quadrant gives a more detailed view of the OPA694 output driving capacity. It notices that the figure is bound to the security operation area of u200bu200b1W's maximum internal power consumption. Organization of the resistance lines to the figure shows that OPA694 can drive ± 2.5V to 25Ω or ± 3.5V to 50Ω, instead of exceeding the output capacity or 1W dissipation limit. The 100Ω load (standard test circuit load) displays the complete ± 3.4V output swing capacity, such as the electrical characteristics.

The minimum output voltage and current excess temperature are simulated at the worst situation at the worst case. Only when the cold starts, the output current and voltage will be reduced to the value shown in the electrical characteristic table. When the output transistor provides power, the knot temperature will increase, reducing the VBE (increasing the available output voltage swing) and increasing the current gain (increase the available output current). In the steady -state operation, because the output stage temperature will be higher than the lowest working environment temperature, the output voltage and current can always be greater than the value shown in the ultra -temperature specification.

Drive capacitance load

For the operator, one of the most common and most common load conditions is capacitance loading. Often, the capacitance load is the input of ADC, including an additional external capacitance that can be recommended to improve the linearity of ADC. High -speed and high -opening gains like OPA694, when the capacitance load is directly applied to the output terminal, it is easy to decrease stability and the peak of the closed -loop response. When to consider the output resistance of the amplifier, this capacitance load introduces an additional pole in the signal channel, which can reduce the phaseTurkey. Some people have proposed several external solutions to solve this problem. When the main consideration is frequency response flat, pulse response and/or distortion, the simplest and most effective solution is to insert a series isolation resistance between the output and capacitance load between the amplifier and the capacitance load. Sexual load is separated from feedback ring. This does not eliminate the pole from the ring response, but shift it and add zero at a higher frequency. The effect of additional zero is to eliminate the phase lag of the container characteristics, thereby increasing the phase margin and improving the stability.

Typical features show the recommended RS and capacitance load (Figure 15) and the frequency response generated under the load. Parasitic capacitance load greater than 2PF will begin to reduce the performance of OPA694. Long PCB trajectory, non -matching cables, and connections with multiple devices can easily lead to exceeding this value. Be sure to consider this impact carefully and get the recommended series resistors as close to the OPA694 output pin as much as possible (see section of the circuit board layout guidance policy).

Direct performance

In the 694Ω load, it provides good distortion. Generally speaking, the second harmonic will dominate the distortion before the base wave signal reaches a very high frequency or power level, and the three harmonic components can be ignored. Then focus on the second harmonic to increase the load impedance directly to improve the distortion. Remember that in Figure 31, RF+is the total load in the reverse configuration. In addition, providing an additional power decoupling capacitor (0.1mf) (for bipolar operations) between the power pins (for bipolar operations) can slightly improve the second -order distortion (3DB to 6DB).

In most operational amplifiers, increasing the output voltage swing will directly increase the harmonic distortion. The typical feature is that the growth rate of secondary harmonics is slightly lower than the expected 2x rate, while the growth rate of the third harmonic is slightly lower than the expected 3x rate. When the test power is doubled, the increase in the second harmonic increase is less than the expected 6DB, and the increase in the third harmonic increase is less than the expected 12DB. This also shows the response curve of the double -tone, the third -order interoperability (IM3). The third -order mixture level is extremely low at the low output power level. Even when the basic power reaches a very high level, the output level still keeps it at a low level. Typical features show that the mixed interoperability power has not increased as predicting the traditional interception model prediction. As the basic power level increases, the dynamic range has not decreased significantly.

Noise Performance

Broadband current feedback calculation amplifier usually has a higher output noise than voltage feedback computing amplifier. OPA694 provides an excellent balance between voltage and current noise items to achieve low output noise. Reverse current noise (24Pa/√Hz) is significantly lower than the previous solutions, and the input voltage noise (2.1NV/√Hz) is lower than most units. This low input voltage noise is a higher non -conversion input current noise (22Pa/√HZ) is achieved at the cost. As long as the exchanges from non -exchange nodes are less than 100Ω, the current noise contribution to the total output noise is not much. The input voltage noise of the operation amplifier is combined with the two input current noise items, which can provide low output noise under various working conditions. Figure 40 shows the noise analysis model containing all noise items. In this model, all noise items are considered noise voltage or current density items, and the unit is NV/√Hz or PA/√Hz.

The total output spot noise voltage can be calculated as the square root of all square output noise voltage contributors. Formula 4 shows the general form of the output noise voltage, as shown in Figure 40.

This expression will be removed by noise gain [ng u003d (1+rf/rg)] will get the equivalent input point noise voltage at the equivalent input point at the non -turquate input site, As shown in equivalent 5.

Evaluate these two equations of OPA694 circuit and component value (see Figure 31 given 11.2nv/√Hz total output point noise voltage and 5.6NV/√Hz Total equivalent input point noise voltage. The total input reference point noise voltage is higher than the 2.1NV/√Hz specification of the voltage noise of only calculator. This reflects the noise increased from reverse current noise multiplication to the output. If the feedback resistance decreases in the high -gain configuration (as mentioned earlier), the total input reference voltage noise given by Formula 5 will be close to the 2.1nv/√Hz of the computing amplifier itself. 10, then the total input reference noise is 2.36nv/√Hz.) DC accuracy and offset control

current feedback computing amplifier like OPA694 provides excellent bandwidth under high gains under high gain. It provides fast pulse stability, but only medium DC accuracy. Electric special display input bias voltage is comparable to high -speed voltage feedback amplifiers. However, the two input bias currents are a bit high and do not match. Although the offset current offset technology is very effective for most voltage feedback computing amplifiers, they usually do not reduce the output DC offset of the broadband current feedback operation amplifier. Because the size and polarity of the two input bias currents are not related, it is invalid to match the source impedance of each input end to reduce their error contribution to the output error. Use the worst case+25 ° C input offset voltage and the configuration of the two input bias current assessment Figure 31. The output offset range of the worst case is equal to:

In the formula, NG u003d non -conversion signal gain

Sometimes it is necessary to fine -tune the output offset zero or DC working point adjustment. Introduce DC bias in the computing amplifier circuitThere are many technologies for moving control. Most simple adjustment technologies cannot correct temperature drift. The computing amplifier of lower speed and accuracy can be combined with OPA694 to obtain the DC accuracy of the accuracy computing amplifier and the signal bandwidth of OPA694. Figure 41 shows an irreversible G u003d+10 circuit, which maintains the output offset voltage of more than ± 7.5mV at a temperature of more than 150MHz signal bandwidth.

This DC coupling circuit uses OPA694 to provide very high signal bandwidth. At a lower frequency, the output voltage is attenuated through the signal gain, and is compared with the original input voltage at the OPA237 input (this is a low -cost, accurate voltage feedback computing amplifier, with 1.5MHz gain bandwidth multiplication). If these two inconsistencies (due to the DC offset introduced by OPA694), OPA237 passes 2.86kΩ reverse seeking and path search and correction current. Some design considerations will allow the circuit to optimize. First, the feedback of OPA237 non -conversion input must be accurately matched with high -speed signal gain. The adjustable resistance of the 2kΩ resistor to the ground will allow low -frequency and high -frequency gain to accurately match. Secondly, the OPA237 transmits control to the cross -frequency area of u200bu200bOPA694 must have abnormal phase linear. These two problems are attributed to designing poles/zero -pairs in the entire transmission function. For the circuit in FIG. 41, the use of 2.86kΩ resistors will meet this requirements nominal. It is impossible to completely cancel the process and temperature. However, this initial resistance settings and accurate gain matching will minimize the long -term pulse sinking.