Features

Extremely low offset drift: maximum 1 μV/° C

Extremely low offset: 120 μV

#8226 ; Low input bias current: maximum 10 PA

Very low 1/F noise: 250 nvpp, 0.1 Hz to 10 Hz

Low noise: 5.1 nv/√Hz

conversion rate: 20 v/μs

low power current: maximum 2 ma

input voltage; input voltage The range includes V power supply

Single power operation: 4.5 V to 36 V

dual power operation: ± 2.25 V to ± 18 v

Non-phase reversal

Industry standard SOIC packaging

vssop, tssop and SOT-23 pack

battery power supply instrument

Industrial control

active filter

data collection system

Automatic test system

Instructions

OPA140, OPA2140 and OPA4140 operational amplifier (OP-AMP) series are a series of low-power JFET input amplifiers with good drift and low input bias current. The output swing and input range from the track to the track include the low noise characteristics of the V-allowing designers to use the JFET amplifier's low noise characteristics, and at the same time, it also interfaces with modern single-power precision modulus converters (ADC) and digital mode converter (DAC) interface.

OPA140 realizes the conversion rate of 11MHz unit gain bandwidth and 20V/μs, while the static current consumes only 1.8mA (typical value). It uses a single 4.5-V to 36-V power supply or dual road ± 2.25-V to ± 18-V power supply.

The temperature of all versions is -40 ° C to 125 ° C, which is suitable for the most challenging environment. OPA140 (single) has 5 stitches SOT-23, 8-shot VSSOP and 8-needle SOIC packaging; OPA2140 (dual) 8-shot VSSOP and 8-pin SOIC packaging; OPA4140 (four cores) are encapsulated by 14 stitches SOIC and 14 -pin Tssop.

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

Typical features

Unless there are other instructions, it is Connect to the middle power, VCM u003d VOUT u003d MID Supply.

Detailed description Overview OPAX140 series operational amplifier is a series of low -power JFET input amplifiers with excellent drift performance and low input bias current. The output swing and input range from the track to the track include the low noise characteristics of the V-allowing designers to use the JFET amplifier's low noise characteristics. At the same time, it also interfaces with modern single-power precision mode converters (ADC) and digital mode converter (DAC) interface. The OPAX140 series reaches 11MHz unit gain bandwidth and 20V/μs conversion rate, which only consumes a static current of 1.8mA (typical). These devices run on a single 4.5-V to 36-V power supply or dual road ± 2.25-V to ± 18-V power supply.

The functional frame diagram shows the simplified chart of OPAX140.

Function box diagram

Function description

Work voltage

OPA140, OPA2140 and OPA4140 series operation amplifiers can be in VS VS u003d 4.5V (± 2.25V) and VS u003d 36V (± 18V) working range using a single power or dual power supply. These devices do not require symmetrical power supply; they only need a minimum power supply voltage of 4.5V (± 2.25V). For VS less than ± 3.5 V, the input range of the co -mode does not include the intermediate power supply. The power supply voltage higher than 40 V will permanently damaged the device; please refer to the absolute maximum rated table. Key parameters are stipulated within the operating temperature range, TA u003d -40 ° C to 125 ° C. See the typical feature part of this data table with the key parameters of the power supply voltage or temperature range.

The dynamic characteristics of the capacitance load and stability

OPAX140 have optimized the common gain, load and operating conditions. The binding of low -closed cycle gains and high -inclusive loads reduces the phase margin of the amplifier and may lead to peak or oscillation of gain. Therefore, the heavier capacitance load must be isolated from the output. Implement the simplest of this isolationThe unilateral method is to connect a small resistance in series at the output end (for example, ROUT is equal to 50Ω).

Figure 19 and Figure 20 show the relationship diagram of the small signal super -adjustment and capacitance load of several rout values. In addition, for the detailed information about analysis technology and application circuits, please refer to the application annotation ""Feedback Formation of Combat Eliers AC performance"" (SBOA015, you can download it from the Ti website).

The output current limit

The output current of the OPAX140 series is limited by the internal circuit to 36 mAh/–30 mia (source/trap) to protect the equipment during the short circuit of the output accident. Short -circuit current depends on the temperature, as shown in Figure 31.

Noise Performance

FIG. 33 shows the general circuit noise of the source impedance of the operating amplifier in the unit gain configuration (no feedback resistance network, so there is no additional noise contribution). The picture shows OPA140 and OPA211, and the general circuit noise is calculated. The computing amplifier itself provides voltage noise components and current noise components. Voltage noise is usually modified as a part of the bias voltage. The current noise is modeled to the time variable in the input bias current, and the voltage component of the noise is generated with the source resistance reaction. Therefore, the minimum noise computing amplifier of the given application depends on the source impedance. For low -source impedance, current noise can be ignored, and voltage noise usually dominates. Due to the FET input of computing amplifiers, OPA140, OPA2140 and OPA4140 series have low voltage noise and extremely low current noise. Therefore, for any actual source impedance, the current noise contribution of the OPAX140 series can be ignored, which makes it a better choice for high -source impedance applications.

Formula in FIG. 33 shows the calculation of the general circuit noise. These parameters are as follows:

EN u003d voltage noise

in u003d current Noise

RS u003d source impedance

k u003d Bolitzman constant u003d 1.38 × 10–23 j/k

#8226 ; T u003d temperature, unit: Kaishi (K)

For detailed information about calculating noise, see the basic noise calculation.

Basic noise calculation

The design of the low noise circuit needs to carefully analyze all the noise sources. In many cases, external noise sources dominate; consider the impact of source resistance on the overall noise performance of the operation amplifier. The total noise of the circuit is a square root and combination of all noise components.

The resistance part of the source impedance generates the heat noise of proportion to the square root of the resistance. This function is shown in Figure 33. The source impedance is usually fixed; therefore, the op amp is selected and the feedback resistanceReduce the contribution of their respective noise.

FIG. 34 illustrates the gain configuration of non -reversal (a) and reversal (b) calculation amplifier circuit. In the configuration of the gains, the feedback network resistance will also produce noise. Generally speaking, the current noise of the amplifier and the feedback resistance reaction to generate additional noise components. However, the extremely low current noise of OPAX140 means that its current noise contribution can be ignored.

The feedback resistance value can usually be selected so that these noise sources can be ignored. Low impedance feedback resistor load amplifier output. The total noise equation of the two structures is given.

Perspective protection

OPA140, OPA2140 and OPA4140 series have internal phase reversal protection. Many FET and dual -pole input computing amplifiers appear phase reversal when entering the linear co -modular range. This situation is the most common in non -switching circuits. When the input is driven to the co -mode voltage range that exceeds the specified specified, the output reverse into the opposite track. The input circuit of OPA140, OPA2140 and OPA4140 can prevent the phase reversal when the co -mode voltage is too high; on the contrary, the output limit of the corresponding track (see Figure 21).

Heat Protection

OPAX140 series operational amplifier can drive 2-kΩ load within the specified temperature range, and the power supply voltage is as high as ± 18 V. In a single power supply configuration, when the load is connected to the negative power supply voltage, the minimum load resistance under the 36 V power supply voltage is 2.8 kΩ. For lower power supply voltage (single power supply or symmetrical power supply), as long as the output current does not exceed 13 mA, the lower load resistance can be used; otherwise, the device's short -circuit current protection circuit may be activated.

Internal power consumption increased when working at a high power supply voltage. Compared with traditional materials, the copper quotation framework structure used in OPA140, OPA2140 and OPA4140 series devices improves heat dissipation. The layout of the printing circuit board (PCB) also helps to reduce the possibility of temperature. The wide copper traces are used as an extra heat dissipation tablet to help heat dissipation. By welding the device directly to the PCB instead of using the socket, the temperature can be further increased to the lowest.

Although the output current is limited by the internal protection circuit, the accidental short circuit of one or more output channels of the device will cause overheating. For example, when an output is short -circuited to the middle power, the typical short -circuit current of 36 mAh causes the internal power consumption of more than 600 mile under the power supply of ± 18 volts.

For the dual OPA2140 (thermal resistance θja u003d 180 ° C/W) in the 8 -stitch VSSOP packaging, when the two channels are short circuit, this power consumption will cause the mold temperature to be higher than the ambient temperature of 220 ° C. This increase in temperature will significantly reduce the service life of the equipment.

In order to prevent overheating, the OPAX140 series has an internal heat shutdown circuit. When the mold temperature exceeds about 180 ° C, the circuit will turn off the device. When the heat shutdown circuit starts, the built -in magnetic stagnation of 15 ° C ensures that the mold temperature must be reduced to about 165 ° C before the device is turned on again.

The combination of the maximum working voltage, maximum operating temperature, load and packaging type should be considered. Figure 35 and Figure 36 show some practical considerations when evaluating OPA2140 (double version) and OPA4140 (4th version).

For example, the maximum static current of OPA4140 is 10.8 mA (2.7 mA/channel). The typical thermal resistance of 14 stitches TSSOP is 135 ° C/W. This parameter means that because the knot temperature should not exceed 150 ° C to ensure reliable operation, the power supply voltage must be reduced, or the ambient temperature should be kept low enough to make the knot temperature not exceed 150 ° C. Figure 35 explains this situation for various packaging types. In addition, the output resistance load can cause additional power loss, which causes self -heating. When determining the maximum power supply voltage or operating temperature, this must also be considered. To this end, Figure 36 shows that when the DC load resistance is 2kΩ, the relationship between the maximum power supply voltage and temperature.

Electric overcasting

Designers often ask the capacity of the operation amplifier to bear the ability of excessive electrical stability. These problems are often concentrated on the device input, but may involve the power supply voltage pins and even output pins. Each different pins function has the electrical stability limit determined by the voltage breakdown characteristics of a specific semiconductor manufacturing process and a specific circuit connected to the pin. In addition, internal electrostatic discharge (ESD) is protected in these circuits to prevent an ESD incident that occurs before and in the process of product assembly.

It helps better understand the correlation between this basic ESD circuit and its electrical excessive stress events. For icons on the ESD circuit contained in the OPAX140 series, see Figure 37 (expressed in the dotted line area). The ESD protection circuit includes several current control diode. These diode connect from the input and output pin and return to the internal power cord, where they will meet the absorption device inside the operation amplifier. The protective circuit aims to maintain a non -activity state during normal circuit operation.

The ESD event generates a short -voltage pulse with a short duration. When it discharge through semiconductor devices, the pulse is converted into a short -time large -current pulse. The ESD protective circuit design is used to provide a current circulation around the core of the computing amplifier to prevent it from being damaged. The energy absorbed by the protective circuit was subsequently lost in the form of heat.

When one ESD voltage is formed on the pin of two or more amplifiers, the current flows over one or more to the diode. According to the path of the current, the absorption device may be activated. AbsorbThe trigger voltage or threshold voltage of the placement is higher than the normal working voltage of the OPAX140, but it is lower than that of the breakdown voltage level of the device. Once this threshold is exceeded, the absorption device will start quickly and keep the voltage on the power rail at the level of safety.

When the operational amplifier is connected to the circuit shown in FIG. 37, the ESD protection component will maintain a state of non -activity without participating in the operation of the application circuit. However, when the external voltage exceeds the operating voltage range of the given pin, this may occur. If this happens, there are risks that some internal ESD protection circuits may be biased and transmitted. Any current is generated by guiding the diode path, rarely involved an absorption device.

FIG. 37 describes a specific example, where the input voltage (VIN) exceeds 500 mv or more of the positive power voltage (+vs). Most of the situations in the circuit depends on the power characteristics. If+vs can absorb the current, the upper input turns to one in the diode to guide and guide to+VS. Excessive current levels flow with VIN. Therefore, the data table specifications are recommended to limit the input current to 10 mAh.

If the power supply cannot absorb the current, VIN can start to provide the current to the computing amplifier, and then take over as a positive power supply voltage source. The risk in this case is that the voltage may rise to the level that exceeds the absolute maximum rated value of the operation amplifier.

Another common problem is that if the input signal is applied to the input terminal when the power+vs or -vs is 0V, what will happen?

Similarly, it depends on the power characteristics under the level of 0 volt or lower than the range of the input signal. If the power supply is displayed as high impedance, the power supply current of the computing amplifier can be provided by the input source through the current control the diode. This state is not a normal partial pressure; the amplifier is likely to not work properly. If the power impedance is low, the current to the diode may become quite high. The current level depends on the capacity of the input source transmission current and any resistance in the input path.

If the power absorption current is uncertain, you can add an external Qina diode to the power pins, as shown in Figure 37. The Qina voltage must be selected so that the diode will not be turned on during the normal operation.

However, its Qina voltage should be low enough to guide the Qina diode when the power pins start to rise to the level of the safe working power supply level.

Electromagnetic interference inhibitory

Electromagnetic interference inhibitory ratio (EMI) describes the EMI antipness of the computing amplifier. For many computing amplifiers, a common adverse effect is the change of the offset voltage after the radio frequency signal rectification. A computing amplifier, if it can more effectively inhibit the changes in the offset caused by EMI, it has a higher EmirrAnd quantify through the decibel value. There are many ways to measure Emirr, but this section provides EMIRR IN+, which specifically describes the Emirr performance of the non -turquate input foot when the RF signal is applied to the operation amplifier. Generally speaking, due to the following three reasons, only EMIRR tests for non -conversion input:

as we all know, the input pin of the computing amplifier is most sensitive to EMI, usually more than a power supply or output pin. Correct RF signal.

no change and inverter operation amplifier input with symmetrical physical layout, and show the almost matched EMIRR performance.

Emirr is easier to measure than other pins on non -conversion pins, because non -conversion input terminals can be isolated on PCB. This isolation allows the radio frequency signal to directly apply to the input terminal that does not be converted without requiring complex interaction or connecting PCB lines from other components. (Figure 38)

The relationship between Emir IN+of OPA2140 and frequency is shown in the frequency. If it is available, any dual and four computing amplifier equipment versions have almost similar emir IN+performance. OPA2140 unit gain bandwidth is 11MHz. The EmirR performance below this frequency indicates a interference signal in the bandwidth of the operational amplifier.

See the application report, the EMI suppression ratio of the computing amplifier (SBOA128).

Table 2 lists the emir in+value of OPA2140 in actual applications. The applications listed in Table 2 can be concentrated on the specific frequency or near it. This information may be particularly interested in designers engaged in such applications, or designers working in other fields may be particularly interested, such as industry, science and medical (ISM) wireless radio wave bands.

Emirr+test configuration

FIG. 39 shows the circuit configuration testing Emir IN+. The radio frequency source is connected to the non -conversion input terminal of the computing amplifier through the transmission line. The computing amplifier is configured as a unit gain buffer topology, and the output connects low -pass filter (LPF) and digital multimeter (DMM). The large impedance loss of the input end of the computing amplifier will cause voltage reflex; however, when the Emirr IN+is determined, this effect will be characterized and explained. The resulting DC offset voltage is sampled and measured by a multimeter. LPF isolates the remnant radio frequency signal that is possible to interfere with the accuracy of the multimeter.

Equipment function mode

OPAX140 has a single function mode. When the power supply voltage is greater than 4.5 v (± 2.25 V)), it can workEssence The maximum power supply voltage of OPAX140 is 36 V (± 18 V).

Application and implementation

Note: The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

OPA140, OPA2140, and OPA4140 are the stable computing amplifiers of the unit gain, with very low noise, input bias current, and input offset voltage. The application of noise or high impedance power supply requires the degraded capacitor pins near the device. In most cases, 0.1-μF capacitors are enough. Designers can easily use the output swing and input range from the orbit to the orbit, including the low noise characteristics of the V-using the JFET amplifier, and also interface to modern, single power, precision data converter.

Typical application

Design requirements

Low -pass filter is usually used to signal processing applications to reduce noise and prevent mixing. OPAX140 is an ideal choice for high -precision active filters. Figure 40 shows the common second -order low -pass filter in the signal processing application.

Use the following parameters in this design example:

gain u003d 5 v/v (reverse gain)

u003d 25 kHz

Second-order Cat Bibi Snowfoot Filter response, the peak of the internal gain is 3-db

Detailed design program

Low-pass network function The unlimited gain multiple feedback circuits are shown in. Use Formula 1 to calculate the voltage transmission function.

This circuit generates a signal reversal. For this circuit, the DC gain and low -pass deadline are calculated by Formula 2:

Software tools can easily simplify the design of the filter. Webench #174; Filter Designer is a simple, powerful and easy -to -use active filter design program. Webench #174; filter design allows you to use TI supplier partners TI computing amplifiers and passive elements to create optimized filter design.

Webench Filter Designer is a Web -based tool provided by the Webench Design Center, allowing you to design, optimize and simulate a complete multi -level active filter solution within a few minutes.

Application curve

Power suggestion

OPAX140 stipulates that it works under 4.5 V to 36 V (± 2.25 V to ± 18 V); many specifications are suitable for -40 ° C to 125 ° C. The typical features are given significant parameters related to working voltage or temperature.

Pay attention to safety

The power supply voltage greater than 40 V will permanently damaged the device; please refer to the absolute maximum rated value.

The 0.1-μF bypass electric container closer to the power supply foot to reduce the coupling error of noise or high impedance power supply. For more detailed information about the side electric container, see the layout of the section.

Layout

layout guide

In order to obtain the best operating performance of the equipment, please use good PCB layout practice, including:

The noise can be transmitted to the analog circuit through the power pins of the entire circuit and the op amp itself. The barrier container is used to reduce the coupling noise by providing a low -impedance power supply of an analog circuit.

-Colin the low ESR and 0.1-μF ceramic side electric container between each power supply foot and ground, and as close to the device as much as possible. Single -width capacitors from V+to the ground are suitable for single power applications.

Circuit simulation and the individual grounding of the digital part are one of the simplest and most effective noise suppression methods. A layer or multi -layer on the multi -layer printing circuit board is usually used for ground layers. The floor helps to distribute heat and reduce the noise of electromagnetic interference. Ensure that the number of numbers and simulation of the ground is separated, and the flowing current flows. For details, see the circuit board layout technology (Sloa089).

In order to reduce parasitic coupling, the input trajectory should be as far away from the power supply or output trajectory as much as possible. If these record channels cannot be separated, it is much better than parallel to the noise recorder.

The external components are as close to the device as possible. As shown in Figure 42, keeping RF and RG approaching inverter inputs can minimize parasitic capacitors.

The length of the input record should be as short as possible. Always remember that the input trajectory is the most sensitive part of the circuit.

Consider setting a driver's low impedance protection ring around the key line. The protective ring can significantly reduce the leakage current of different potentials nearby.

In order to obtain the best performance, TI recommends cleaning PCB after assembly.

Any precision set circuit may change performance changes due to water entering plastic packaging. After any water -based PCB cleaning process, TI recommends baking PCB components to remove the water packaging in the cleaning processEssenceIn most cases, it is enough to bake for 30 minutes after low temperature at 85 ° C.

layout example