Features

Lead -free packaging

Integrated power switch: Guarantee 1.5 a

Wide input range: 2.7 V ] built -in over -current protection

frequency folding reduction reduction conditions

lag heat shutdown

adjustment Positive or negative output voltage

Close current: maximum 50 A

compatible with LT1372/1373

The temperature range is wide

#9830; Industrial grade: -40 ° C to 125 ° C #9830; Commercial grade: 0 ° C to 125 ° C

Instructions

1.5 A 280 KHz/560 KHz booster regulator

CS5171

/2/3/4 The product is 280kHz/560kHz switch regulator, which has high efficiency, 1.5A Integrated switch. The working voltage range of these devices is wide, ranging from 2.7 to 30 volts. The flexibility of the design enables the chip to work under most power configuration, including boosting, rejuvenating, forward, reverse, and sepic. The integrated circuit adopts a current mode structure, allowing good loads and circuit adjustments, and a practical means of limiting current. Combining high -frequency operations with a highly integrated regulator circuit can obtain very compact power solutions. Circuit design includes functions such as frequency synchronization, turning off and positive, negative voltage adjustment feedback control. These parts are compatible with the sales of LT1372/1373.

典型性能特征

[123 ]

应用程序信息操作理论电流模式控制[123 ] The CS517X series adopts a current mode control scheme, where the PWM slope signal comes from the power switch current. The slope signal is compared with the output of the error amplifier to control the connection time of the power switch. The oscillator is used as a fixed frequency clock to ensure a constant operating frequency. With the traditional voltage modeCompared with control, the control schemes have several advantages. First, the slope signal obtained directly from the inductors responds to the changing line voltage changes. This eliminates delays caused by the output filter and error amplifier, and the latter usually appears in the voltage mode controller. The second advantage comes from the inherent challenge current limit that only cuts the peak switch current. Finally, because the current mode instruction is the output current instead of the voltage, the filter only provides a single pole for the feedback circuit. This enables more simple compensation in comparison voltage mode circuits and higher gain bandwidth.

The current mode is controlled by the premise that it does not damage its obvious advantages, and its unique problems occur, mainly the secondary resonance oscillation when the duty cycle exceeds 50%. The CS517X series solves this problem by using a slope compensation scheme, where the fixed slope generated by the oscillator is added to the current slope. Under the premise of not sacrificing the advantages of current mode control, it provides appropriate slope to improve the stability of the circuit.

The oscillator is fine -tuned to ensure the frequency accuracy of 18%. The output of the oscillator is opened with a frequency of 280 kHz (CS5171/2) or 560 kHz (CS5173/4), as shown in Figure 27. The power switch is turned off by the output of the PWM comparator.

TTL compatible input at the SS pin can synchronize 1.8 times the frequency of the basic oscillator. As shown in Figure 28, in order to synchronize to a higher frequency, the power switch is turned on before the output of the oscillator is high to reset the oscillator. Synchronous operation allows multiple power to work at the same frequency.

The continuous logic of the SS pin will turn off IC and reduce the power current.

Another feature includes the frequency shift to 20%when the trigger threshold of the NFB or FB tube is triggers. Under the condition of power -powered, overloaded or short -circuit conditions, the minimum switch is limited by the minimum pulse width of the pulse width. The additional time off reduction time reduces the minimum occupation ratio of external components and IC itself.

As mentioned earlier, this block also generates slope compensation to improve the stability of the regulator.

For CS5172/4, the internal reference voltage of NFB pins is -2.5 V, and the input impedance is about 250 k. For CS5171/3, the FB pin is directly connected to the reverse input of the positive error amplifier, and its non -reverse input is given by 1.276V reference voltage. Both amplifiers are cross -guided amplifiers, with high output impedance of about 1 m, as shown in Figure 29. The VC pin is connected to the output end of the error amplifier, and the internal clamping is between 0.5 V and 1.7 V. The typical connection at the VC pin includes a capacitor, and the capacitor is connected in series with the ground resistance to form polar/zero carrier compensation.

You can in VC needle and groundConnect the outer flow to reduce its clamp voltage. Therefore, the current limit of the internal power transistor current is reduced from its nominal value.

The switch driver and power switch

The switch driver receives the control signal from the logic part to drive the output power switch. The switch is grounded to PGND pins by launching polar resistors (a total of 63 meters). PGND does not connect to the IC substrate, so the switching noise can be isolated from simulation. The peak switch current is restrained by internal circuits. Due to the slope compensation, the clamp current guarantees greater than 1.5 A and changes with the duty ratio. The power switch can withstand the maximum voltage of 40 V on the set electrode (V pins). The saturation voltage of the switch is usually less than 1V to minimize power consumption.

Short -circuit status

When a short circuit occurs, the inductor current will increase during the entire switching cycle, resulting in excessive current generated input power supply. Because the control IC does not limit the load current method, the external current restrictions (such as fuse or relay) must be implemented to protect the load, power and IC.

In other topology, the built -in frequency offset in the integrated circuit can prevent damage to the chip and external components. This function reduces the minimum duty cycle and allows the secondary transformer to absorb excess energy before the switch is turned on.

CS517X can be activated by connecting the VCC pin to the voltage source or enabled the SS pin. The startup waveform shown in FIG. 30 is measured in the Boost converter demonstrated in the application diagram on page 2 of this document. After the input voltage is turned on, the waveform shows all the phases during the transitional transition.

When the V voltage is lower than the minimum power supply voltage, the V pins are in a high impedance state. Therefore, the current through the inductance and diode directly from the input power supply to the output. Once the voltage reaches about 1.5 volts, the internal power switch will be briefly turned on. This is part of the normal work of CS517X. The connection of the power switch shows the initial current swing.

When the V pins voltage rises to the threshold, the internal power switch begins to switch, and the voltage pulse can be seen at the V pins. When the low output voltage of the FB pin is detected, the built -in frequency shift function reduces the switch frequency to a small part of its nominal value, thereby reducing the minimum duty cycle, otherwise the minimum connection time of the switch will limit the minimum duty cycle ratio Essence The peak current at this stage is limited by internal current restrictions.

When the FB pin voltage rises to 0.4V, the frequency rises to its nominal value, and the peak current begins to decrease as the output voltage approaches. The excess of the output voltage is prevented by the active pull. Once the overvoltage is detected, the exchange current of the error amplifier will increase. The overvoltage condition is defined as the FB pin voltage 50 millivolves higher than the reference voltage.

Component selection

Frequency compensation

Frequency compensationIt is to achieve ideal temporary response and DC regulation under the premise of ensuring the stability of the system. As shown in Figure 31, the typical compensation network provides frequency response of poles and zero points. The BODE diagram shown in FIG. 32 further illustrates this frequency response.

The high DC gain in FIG. 32 is ideal for realizing the DC accuracy of the changes in lines and loads. The DC gains of cross -guided errors can be calculated as follows:

In the formula: GM error placing large -scale cross -guidance; RO error amplifier output resistance ≈1 m.

The low -frequency pole FP1 is determined by the output resistance and C1 of the error amplifier as:

The first zero generated by C1 and R1 is:

]

The phase leader provided by this zero point ensures that the ring road has at least 45 ° at the cross frequency. Therefore, the zero point should be close to the pole generated in the power level, and the pole can be recognized at the frequency:

In the formula: CO Equal output capacitance of error placing large device ≈120pf ; RLOAD load resistance.

High -frequency polar F may be placed at the ESR zero point or half of the switch frequency of the output filter. Putting the magnetic pole to this frequency will reduce the switching noise. The frequency of this pole is determined by the values of C2 and R1:

A simple way to ensure that enough phase margin is the design frequency response. The unit gain is crossed. The cross frequency should be selected between the midpoint between the fz1 and FP2 with the largest manner.

Negative voltage feedback

Since the negative error release large input impedance as shown in Figure 33, its induction error must be considered. If the negative output voltage of the NFB pins is reduced by a separator, the formula for calculating the output voltage is:

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Voltage limit

In the Boost topology, the maximum voltage of the V pins is set by the maximum output voltage plus the output diode forward voltage. The forward voltage of the Schottky diode is usually 0.5 V, and the super fast recovery diode is 0.8 v

In the formula: vf output diode positive voltage.

In the middle, the peak VSW voltage is controlled by the following factors:

In the formula: n transformer number ratio ratio, one or two times.

When the power switch is turned off, there is an voltage peak superimposed on the steady -state voltage. Generally, this voltage peak is caused by the leakage of the transformer, charging and boring capacitors between VSW and PGND pins. In order to prevent the voltage at the VSW pin from exceeding the maximum rated value, the transient voltage suppressor of the two -pole diode is connected in parallel with one winding. Another method of cutting the switch voltage is to connect a transient voltage suppressor between the VSW pin and ground.

Select magnetic element

When selecting magnetic elements, you must consider peak current, magnetic core and iron oxygen material, output voltage ripples, electromagnetic interference, temperature range, physical dimensions and costs, etc. factor. In the Boost circuit, the average inductor current is the product of the output current and voltage gain (VOUT/VCC). It is assumed that the energy transfer efficiency is 100%. In the continuous transmission mode, the current of the electromotive ripple is:

where: for CS5171/2, F 280 kenum; for CS5173/4, F 560 kilo Essence

The peak value of the inductance current is equal to half of the average current plus the ripple current, and the inductive saturation should not be caused. When selecting the value of the inductance according to the capacity of the ripple current in the circuit, you can also refer to the above formula. Small ripple current provides the benefits of small input capacitors and larger output current capabilities. Core geometric bodies such as rods or barrels are prone to high magnetic field radiation, but they are relatively cheap and small. Other magnetic core geometric shapes, such as the ring, provide a closed magnetic ring to prevent electromagnetic interference.

Input capacitor select

In the boost circuit, the inductance becomes part of the input filter, as shown in Figure 35. In the continuous mode, the input current waveform is triangular and does not contain large pulse current, as shown in Figure 34. This reduces the requirements for input capacitors. In the continuous pitch mode, the peak of the inductive ripple current is given in the previous section. It can be seen from FIG. 34 that the product of the effective series resistance (ESR) of the inductive current ripple and the input capacitor determines the V rip of the rod. In most applications, ESR's input capacitors can work to 1.5A switching currents within the range of 10F to 100F.

The situation is different in the anti -gravity circuit. The input current is discontinuous, and the input capacitor will see a significant pulse current. Therefore, the anti -excitement regulator has two requirements for capacitors: energy storage and filtering. In order to maintain the stable voltage supply of the chip, a low ESR storage capacitor greater than 20F is required. In order to reduce the noise generated by the inductance, the 1.0F ceramic capacitor is inserted as close to the chip between V and ground.

By checking the waveform shown in Figure 36, we can see that the output voltage ripple comes from two main sources, that is, the charging and discharge of the capacitor ESR and the output capacitor. In the boost circuit, when the power switch is turned off, I flow into the output capacitor, causing instant V i × ESR. At the same time, the current IL-IOUT charges the capacitor and gradually increases the output voltage. When the power switch is turned on, IL is diverted to the ground, and IOUT discharge output capacitors. When I ripples are enough, I can treat i as a constant, which is equivalent to input current I.

In summary, the peak of the output voltage-peak ripples can be calculated through the following formulas:

In order to facilitate the design, the equation can be more convenient to use V more conveniently V V. , V and I are as follows:

The capacitor RMS ripple current is:

Although the above equation is only applicable Boost circuit, but similar equations can also be exported for anti -gratifying circuits.

Reduce current limit

In some applications, the designer may prefer to switch the current below 1.5 A. You can connect the outer streaming between the V pin and ground to reduce its clamp voltage. Therefore, the current limit of the internal power transistor current is reduced from its nominal value.

The voltage on the V pins can be calculated in the formula:

In the formula: re .063, the value of the internal transmitting polar resistor; AV 5V/V, the current detection amplifier of the amplifier Gain.

Because R and A cannot be changed by the end user, the only available method that limits the switch current below 1.5 A is to clamp the V pins at a lower voltage. If the maximum switch or inductance current is replaced in the above equation, the required clamp voltage will be obtained.

A simple diode clamping device, as shown in Figure 37, claw the V voltage to the diode drops above the voltage above the resistor R3.

Unfortunately, such a simple circuit is usually unacceptable, if V is a loose adjustment.

Another method to solve the flow limit problem is to use sensors to measure the current from the external measurement. This circuit is shown in Figure 38.

The switching current is limited to

where: VBE (q1) Q1's base emittering pole pressure drop, usually It is 0.65 V.

The improved circuit can work normally without adjusting the voltage. Unfortunately, for the overall efficiency of the circuit, the price must be paid for it. Designers should pay attention to that input and output grounding is no longer common. In addition, the addition of current fluctuation resistor RSENSE will lead to considerable largePower loss, and increases as the duty occupation ratio increases. The resistor R2 and the capacitor C3 form a low -pass filter to eliminate noise.

Substitution oscillation

Substitution oscillation (SHM) is a problem existing in the current mode control system. When the duty ratio exceeds 50%, the system will produce unstable. SHM only occurs in the switch regulator with continuous inductance current. This instability is not harmful to the converter and usually does not affect the adjustment of the output voltage. The SHM will increase the radiation electromagnetic noise from the converter, and in some cases, the inductor may emit a high -frequency listening noise.

SHM is a problem that is easy to solve. The increased slope of the inductance current is supplemented by the internal slope compensation " to prevent any unstable duty cycle from continuing to the next switching cycle. In the CS517X series