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2022-09-19 17:33:03
LMV821 single/LMV822 dual/LMV824 four-core low voltage, low power, R-TO-R output, 5 trillion Hehe operational amplifier
General description
lmv821 /LMV822/LMV 824 brings the economy of performance and low -voltage/low -power system. The 5 MMS unit gain frequency and the 1.4 V/microsecond conversion rate of 1.4 V/microseconds, the static current is only 220 Micro -An/amplifier (2.7 volts). They provide rail pairing (R-TO-R) output swing to heavy load ( 600 ω guarantee). The input co -mode voltage range includes grounding, and the maximum input offset voltage is 3.5mV (guarantee). They can also comfortably drive a large capacity load (see the application instructions). LMV821 (single) can be used in ultra-micro SC70-5 , which is about half the size of the previous title, SOT33-5. Overall, LMV821/LMV822/LMV824 (single/dual/4) is low voltage, low power, performance operations amplifier, and can be designed as a wide range of applications at the economic price.
Features
(for a typical 5 V power supply value; unless there is another instructions)
Super micro, SC70-5 package 2.0 x 2.0 x 1.0 mm
[[ 123] Guarantee 2.5 V, 2.7 V and 5 V performance
The largest VOS 3.5 MV (Guarantee)
VOS temperature. Drifting 1 UV/℃
Gigabawa product@2.7 volts 5 mega Herm
Power@2.7 v 220 Weian/amplifier
minimum SR 1.4 v/US (guarantee) (guarantee)
The co-mode inhibitory ratio of 90 decibels
PSRR 85 decibel
Rail (R-to-R) output amplitude-under 600Ω load, from the rail [123 123 [123 ] 160 MV-under 10 kΩ load, 55 MV from orbit
vcm@5 volts -0.3 volts to 4.3 voltsStable under high-tolerant load (refer to the application chapter )
Application
Wandering phone
Mobile phone
Table laptop
PDA
PCMCIA Company [ 123]
Absolute maximum rated value (Note 1)
ESD tolerance (Note 2)Machine model 100V
[
[ 123] Human model
lmv822/824 2000 volts
lmv821 1500 volt
Differential input voltage ± power voltage
Power supply voltage (V+-伏-) 5.5 volts
Output to V+short circuit (Note 3)
output to V-short circuit ( Note 3)
Welding information
Infrared or convection (20 seconds) 235 degrees Celsius
Storage temperature range -65 ° C to 150 ° C
end Note (Note 4) 150 3
Work rated value (Note 1)
Power voltage 2.5V to 5.5V
Temperature range
LMV821, LMV822 , LMV824 40 degrees C ≤T j ≤85 degrees C
Thermal resistance (θja)
Ultra micro SC70-5 package
5-pin surface installation
440
Celsius/tile
Micro SOT33-5 Packaging 5 stitches Surface Patch
265 degrees Celsius/tile
] SO packaging, 8 -needle surface
Install 190 ° C/W
MSOP component, 8 -needle mini type
Install 235 ° C/W
] SO packaging, 14 -needle surface
Install 145 ° C/W
tssop packaging, 14 stitches 155 ℉ ℉] C/W
2.7V DCT characteristics
] Unless there are other regulations, it is guaranteed to guarantee TJ 25 ° C. V+ 2.7V, V- 0V, VCM 1.0V, VO 1.35V and R L GT; 1 MΩ. Black body restrictions are suitable for extreme temperatures.
5V AC electrical characteristics
Unless there are other regulations, it is guaranteed to guarantee TJ 25 ° C, V+ 5V, V- 0V, VCM 2V , VO 2.5V and R GT; 1 MΩ all the limits. Black body restrictions are suitable for extreme temperatures.
Note 1: Absolute maximum rated value indicates the limit that the device may be damaged. When the working rated value indicates that the device is in the state, the device tends to work normally, but it cannot guarantee specific performance. For guarantee specifications and test conditions, see electrical characteristics.
Note 2: Human model, 1.5 kΩ, 100 PF series. Machine model, 200Ω with 100 PF series.
Note 3: Applicable to the operation of single power and division. Under the condition of rising ambient temperature, continuous short -circuit operations may cause more than maximum allowable cord temperature 150 ° C. Long -term output current exceeding 45 mAh may adversely affect reliability.
Note 4: The maximum power consumption is the functions of TJ (MAX), θJa, and TA. The maximum allowable power consumption at any ambient temperature is pd (TJ- (maximum value) -t a)/θJa. All numbers are suitable for packaging directly welded to the PC board.
Note 5: Typical values represent the most likely parameter model.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ 5V. Connect with a 3V step input voltage follower. The specified number is the slower in the positive and negative conversion rate.
Note 8: Reference Input, V+ 5V and RL 100kΩ are connected to 2.5V. Each Ampen is motivated in turn at a frequency of 1kHz, generating V o 3VPP
5V AC electrical characteristics
Typical performance characteristics, unless otherwise specified, vs +5V, single power supply, TA 25 25 Alas.
Application instructions
This application description is divided into two parts: design precautions and application circuits. 1.0 Design Consider this section includes the following design precautions:
1. Consider frequency and phase response
2. Considering the pulse of unit gain
3. Input bias current pay attention to pay attention to pay attention Matters
1.1 Phase response Considering the relationship between the opening frequency response considering the opening frequency response determines the closed loop stability (negative feedback). The open -loop phase response makes the feedback signal actively feedback, thereby becoming unstable. In addition, the output phase angle comes from the input phase angle, the more stable the negative feedback. Phase margin (φm) specifies the relationship between the output and the input phase at the cross point of the unit gain. Zero -phase margin means that the input and output are completely interacted with the phase, and the unit gain frequency is maintained oscillation. The AC table shows φm under empty load conditions. But φm changes with the load. The relationship diagram of the gain and phase margin and frequency of the curve part can be used to determine the φm under different load conditions. To do this, check the phase angle of the diagram, find the incremental point of the gain frequency of the phase unit, and determine that the zero degree of this distance of the phase of the phase is far away. The greater the more phase of the phase, the more stable the circuit is running. Bandwidth is also affected by loads. Graphic 1 and Figure 2 provides a way to quickly view the bandwidth of various load AFs that affect φm and LMV821/822/824 series. These charts show that the capacitance load reduces φm and bandwidth at the same time, while the resistance load will reduce the bandwidth, but it will increase φm. Please note that how to increase the capacitor in parallel 220 pickups, increase φm about 20 degrees, but the price is about 100 kg of frequency bandwidth. In short, the LMV821/822/824 series provides good stability for loading conditions.
1.2 Unit's gain pulses should be considered to increase the unit gain, and the pulse response stability. For example, when the 220 PF load is driven, the pull resistance on the 600Ω can reduce the over -flushing voltage by about 50%. Figure 3 shows how to achieve a pull -down resistor with a pulse stability
You can drive higher capacitors to pull the resistance by reducing the capacitance value, but the value does not not have It should be reduced to the sinking ability of the part. Another method uses the isolation resistance shown in Figure 4. Figure 5 shows the pulse response generated by the LMV824, and the resistor is driven by 20Ω isolation driving 10000 PF load.
1.3 Input bias current Considering
Input bias current (IB) will generate some significant offsets Voltage. This offset is mainly due to the IB flow through negative feedback resistance RF. For example, if IB is 90NA (maximum room), RF is 100 kΩ, and then the offset 9 MV will be developed (VOS IBX-RF), using compensation resistance (RC), as shown in Figure 6 to eliminate this effect. However, input bias current (iOS) will still generate bias voltage in the same way-usually 0.05 mv at room temperature
2.0 Application circuit
This section introduces the following application circuits:
1. Phone line transceiver
2. Simple " mixer (amplifier)
3. Double amplifier has active filtering Device (DAAFS)
a. Low -pass filter (LPF)
b. ] 2.1 Phone Line Sendor
The phone line transceiver in FIG. 7 provides a full dual -work connection through the micro converter PCMCIA. Differential structure (UR) of the receiving department cancel the reception of the transmitter part (UT). Note that the input signal of the differential configuration is the transmission voltage (VT) and VT/2. This is because the Rmatch is selected to match the impedance of the coupling telephone line; therefore