The TMS320F28335 is available in a 176-pin LQFP quad package, and its functional structure can be found in References. Its main performance is as follows: High-performance static CMOS technology, the instruction cycle is 6.67 ns, and the main frequency is up to 150 MHz; High-performance 32-bit CPU, single-precision floating point arithmetic unit (FPU), using Harvard pipeline structure, can quickly Execute interrupt response, and have a unified memory management mode, can use C/C++ language to achieve complex mathematical algorithms; 6-channel DMA controller; On-chip 256 Kxl6 Flash memory, 34 Kxl6 SARAM memory. 1 Kx16 OTPROM and 8 Kxl6 Boot ROM. Among them, Flash, OTPROM, and SARAM of 16 Kxl6 are all protected by password; the control clock system has on-chip oscillator, watchdog module, supports dynamic PLL adjustment, internal programmable phase-locked loop, and changes the input of CPU by setting the value of corresponding register by software Clock frequency; 8 external interrupts, relative to the DSP of the TMS320F281X series, there is no dedicated interrupt pin. GPI00~GPI063 are connected to this interrupt. GPI00-GPI031 are connected to XINT1, XINT2 and XNMI external interrupts, GP1032~GPI063 are connected to XINT3-XINT7 external interrupts; Peripheral interrupt expansion controller (PIE) that supports 58 peripheral interrupts, manages on-chip peripherals and external pins interrupt request; Enhanced peripheral modules: 18 PWM outputs, including 6 high-resolution pulse width modulation modules (HRPWM), 6 event capture inputs, 2-channel quadrature modulation module (QEP); 3 32 Bit timer, timer 0 and timer 1 are used as general timers, timer 0 is connected to the PIE module, timer 1 is connected to the interrupt INTl3; timer 2 is used in the on-chip real-time system of DSP/BIOS, connected to interrupt 88