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2022-09-20 05:00:00
BQ4011/BQ4011Y is 32kx8 non -easy loss SRAM
Features
#10148; Data retention in the case of power failure
#10148; automatic writing protection during power -powered/power -off cycle
#10148 ; Industrial standards 28 stitches, 32K X 8 stitches
#10148; conventional SRAM operation; unlimited writing cycle
#10148; 10 -year minimum data retention period
#10148; internal battery isolation, until power to power
General description
cmos Control circuit continuously monitor whether a single 5V power supply exceeds the tolerance conditions. When VCC exceeds the allowable range, SRAM is unconditionally written protection to prevent accidental writing operations.At this time, open the integral energy source to maintain the memory until VCC is recovered effective.
BQ4011 uses CMOS SRAM with a very low -to be available, plus a small lithium coin battery to provide non -easy loss without long -term writing cycle and EEPROM -related writing cycle limit.
BQ4011 does not require external circuits, sockets are compatible with industry standard SRAM and most EPROM and EEPROM.
Function description
When the power supply is valid, BQ4011 works as a standard CMOS SRAM. During the period of power -off and power -powered, BQ4011 acts as non -easy -to -loss memory, automatically protected and storage memory content.
Continuous monitoring of the power failure detection threshold VPFD of the power supply of the VCC power supply for continuous monitoring of the power supply circuit. The VPFD 4.62V of the BQ4011 display is usually used in a system with a power tolerance of 5%. The VPFD 4.37V of the BQ4011Y display is usually used in a system with a power tolerance of 10%.
When VCC is lower than the VPFD threshold, SRAM is automatically written into the protection data. All outputs become high impedance, and all inputs are considered indifferent. " If an effective access is undergoing a power failure