Features

#10148; Integrated NV SRAM, real -time clock (RTC), crystal, power failure control circuit and lithium energy

] #10148; The clock register is the same as the static RAM interview; these registers are located at 16 top RAM positions

#10148;

Century byte register (that is, in line with Y2k)

#10148;

It is not easy to volatilize at all, running more than 10 accurate power resets in the case of power off

#10148;

Programmable watch dog timer and RTC alert

#10148;

BCD encoding year, month, day, day, hours, minutes, and seconds, with, band, with Automatic leap year compensation, valid to 2100 years

#10148; battery voltage level indicator logo

#10148; [[[[[[

123] Power failure writing protection allows 10%VCC power supply tolerance

#10148;

Before the first power is powered, lithium energy disconnect power is kept fresh

#10148;

It is also applicable to industrial temperature range: -40 ° C to+85 ° C

] DS1556

It is a full function, 2000 compatibility (Y2KC), real -time clock/calendar (RTC), with RTC alerts, door -to -see dog timers, power -on reset, battery monitor, and 128K X 8 non -easy loss. Sexual static RAM. The user's access to all registers in DS1556 is completed by a byte width interface, as shown in Figure 1. The RTC register contains a 24 -hour BCD format century, year, month, day, day, time, time, and secondary data. The monthly and leap year automatically correct.

The RTC register is dual buffer to a internal and external set. Users can directly access external sets. The clock/calendar update of the external storage set can be disabled and enabled to allow users to access static data. Assuming that the internal oscillator has been opened, the internal set of the register will continue to be updated, which has nothing to do with the external register setting to ensure that it always maintains accurate RTC information.

Matching the alarm value of user programming. When the device is powered by the system power supply, the interruption is always available, and it can be programmed to occur in the battery power supply as a system wake -up. IRQ/FT or RST output can also be used as a CPU watch dog timer, CPU livingMonitoring is monitored. If the correct activity is not detected within the programming restrictions, the interrupt or resetting output will be activated. DS1556 is used to power out to detect the power failure or failure, and keep the CPU in a safe reset state until the normal power supply recovery and stable; the RST output is used for this function.

DS1556 also contains its own power failure circuit. When the VCC power supply enters a super -different state, the circuit will automatically cancel the selection device. This function provides high data security during the unpredictable system operation of low VCC levels.

Packaging

DS1556 has two packages (32 -pin DIP and 34 -pin PowerCap modules). The 32 -needle DIP module combines the crystals, lithium energy and silicon in a package. The 34 -pin PowerCap module board is designed to connect to a separate PowerCap (DS9034PCX) contacts containing crystals and batteries. This design allows PowerCap to install PowerCap on the top of DS1556P after completing the surface installation process. The installation of the power cap on the surface installation process can prevent the crystals and batteries from damaging the high temperature required for the return of the solder. The power cover is key control to prevent reverse insertion. PowerCap module and PowerCap are separated and packed in separate containers. PowerCap's part number is DS9034PCX.

Data reading mode

As long DS1556 is in the reading mode. Equipment architecture allows access to any valid address location. After the last address input is stable, as long as the CE and OE access time are met, the DQ tube foot in TAA will provide valid data. If you do not meet the CE or OE access time, the latter of TCEA or output visits (TOEA) will provide valid data. The status of the data input/output pin (DQ) is controlled by CE and OE. If the output is activated before TAA, the data cable will be driven to the middle state until TAA. If the address input is changed when CE and OE maintains effective, the output data will be valid within the time of the output data maintained (ToH), but then it will be uncertain until the next address is visited.

Data writing mode

As long as we and CE are in active state, DS1556 is in the writing mode. The beginning of writing refers to the conversion of the latter occurrence of we or CE. The address must be maintained throughout the cycle. CE and we must return to at least non -active TWR before starting or writing cycle. The data in the middle must be effective TDS before the end of the writing, and it must be valid in the subsequent TDH. In typical applications, the OE signal will be very high during the writing cycle. However,If you are careful to use the data bus to avoid the use of the bus, OE can be active. If OE is low before the transition to low, then the data bus can be transformed into activity through the address input definition. The low conversion is opened, and then the output TWEZ is disabled after activation.

Data retention mode

When VCC is greater than VPF, 5V devices are completely accessible, and data can only be written and read. However, when the VCC is lower than the power failure point VPF (the point of writing protection), the internal clock register and SRAM are prevented from any visits. When VSO (battery power supply level) is lower than the battery switch point, the equipment power supply is switched from the VCC pin to the internal lithium battery. Before the VCC is restored to normal level, RTC operations and SRAM data are maintained from the battery.

When VCC is greater than VPF, the 3.3V device is completely accessible, and the data can only be written and read. When VCC is lower than VPF, access device is prohibited. If VPF is smaller than VSO, when VCC is lower than VPF, the device power supply switches from VCC to internal lithium batteries. If VPF is greater than VSO, when VCC is lower than VSO, the device power supply switches from VCC to internal lithium batteries. Before the VCC is restored to normal level, RTC operations and SRAM data are maintained from the battery.

When VCC is disconnected, all control, data and address signals must be powered off.

Battery life

DS1556 has a lithium power supply that is designed to provide energy for clock activities, and keep clocks and RAM data when VCC power does not exist. The capacity of this internal power supply is enough to provide continuous power supply within the service life of the DS1556 installation equipment. For the purpose of standardized, the expected life span of 25 degrees Celsius is 10 years, and the internal clock oscillator runs without VCC. Each DS1556 was transported from Dallas Semiconductor. Its lithium energy was disconnected, ensuring all energy capacity. When VCC is first applied to a level higher than VPF, lithium energy can be used for battery backup operations. The actual life expectancy of DS1556 will be much longer than 10 years, because the energy of internal batteries will not be consumed when VCC exists.

Internal battery monitor

DS1556 continuously monitor the battery voltage of the internal battery. Low battery power (BLF) bit of the sign register (1FF0H) is not written, and it should always be 0 when reading. If there is 1, the lithium energy consumed, and the contents of RTC and RAM are suspicious.

Powering and reset

Temperature compensation comparator circuit monitoring VCC level. When the VCC drops to the power failure, the RST signal (leaking) is pulled down. When the VCC returns to the nominal level, the RST signal continues to be pulled down 40 ms to 200 ms. Unique power -to -power reset functionIt can work in RTC oscillator, so no matter whether the oscillator is enabled, it can work.

clock operation

Table 2 and below paragraphs describe the operation of RTC, alarm and door dog function.

X unused, read/write under the control of the read and write

AE Alert sign enabled for enabled

Y Unused, read/write, no writing and read position control

ABE Alarm in the battery backup mode

ft frequency testing bit

AM1 to AM4 alarm mask position

OSC oscillator start/stop bit

WF see the door dog logo

W write in place [123 ]

AF alarm logo

R Reading position

0 0 (read only)

WDS watch dog steering position

[123 ] BLF Low battery power sign

BMB0 to BMB4 Seeing Dog multiplication

RB0 to RB1 watch dog resolution level

clock oscillator control [ 123] The clock oscillator can stop at any time. In order to extend the service life of the backup lithium battery source, the oscillator can be turned off and the current consumption of the current battery can be used. OSC is MSB of the second register (1FF9H). Setting to 1 will stop the oscillator, and the setting to 0 will start the oscillator. DS1556 is shipped from Dallas Semiconductor Corporation, the clock oscillator is closed, and the OSC bit is set to 1.

Reading Clock

When reading RTC data, it is recommended to stop the update of the external dual cushioning RTC register set. This allows the external register to enter the static and allows reading data without changing the register value during the reading process. In this state, the normal update of internal registers will continue. When 1 write the reading of the control register (1ff8H), the external update stops. As long as 1 keeps in the control register read position, the update stops. After the HALT is issued, the register reflects the current RTC count (day, date and time) when the Halt command is issued. The normal update of the external register group will be restored within 1 second after the read position is set to 0 and lasts at least 500 seconds. Reading must be zero and last for at least 500 seconds to ensure that external registers will be updated.

Set the clock

The MSB bit B7 controlled by the register is written. Set the position to 1 (the same as the reading position), and it will stop updating the DS1556 (1ff8h to 1ffh) register. After setting the position to 1, the RTC register can load the required RTC count (day, date andtime). Set the position to 0, then transmit the value of the internal RTC register, and allow the normal operation to restore it.

Clock accuracy (DIP module)

DS1556 guarantees 1 minute accuracy of 1 minute per month under 25 degrees Celsius. RTC is calibrated by Dallas Semiconductor Corporation in the factory with non -easy -to -sex tuning elements without additional calibration. Therefore, the clock calibration method is not available and unnecessary. The electrical environment will also affect the clock accuracy. Pay attention to put RTC on the lowest EMI segment of the PC board layout. For more information, see the application instructions 58.

Clock accuracy (POWERCAP module)

DS1556 and DS9034PCX for accuracy testing. Once installed together, the module usually maintains the time accuracy of 1.53 minutes (35 ppm) per month at 25 ° C. The electrical environment will also affect the clock accuracy. Pay attention to the minimum EMI segment of the RTC on the PC plate layout. For more information, see the application instructions 58.

Frequency test mode

DS1556 frequency test mode uses IRQ/FT output. When the oscillator runs, when the FT bit is 1. The alarm logo enable bit (AE) is 0, the door dog control bit (WDS) is 1 or the door dog register reset (register 1ff7h 00h), IRQ/FT output It will be switched with 512 Hz. IRQ/FT output and frequency test mode can be used to measure the actual frequency of 32.768kHz RTC oscillator. IRQ/FT pin is an open leak output, which requires a pull -up resistor to work normally. When power is powered, the FT position is cleared to 0.

Use alarm clock

DS1556 alarm setting and control is located in the register 1ff2h to 1FF5H. The register 1FF6H contains two alarm activation bits: alarm enable (AE) and the alarm in the backup enable (ABE). Ae and A BE bits must be set according to the following instructions to activate IRQ/FT output under the matching alarm conditions.

The alarm is programmable to activate at a specific date of one month, or daily, hour, minute or second. It can also be programmed to turn off when the DS1556 is in a battery power supply operation and wakes it up as a system. Alarm shielding AM1 to AM4 control alarm mode. Table 3 shows possible settings. The configuration of the configuration in the table is default per second to inform the user's wrong alarm settings.

When the RTC register value matches the alarm register setting, the alarm logo position (AF) is set to 1. If the alarm logo is also set to 1, the alarm conditions will activate the IRQ/FT pin. IRQ/FT signals are cleared by reading or writing the logo register (address 1ff0h), as shown in Figure 2 and 3.When the CE is activated, the IRQ/FT signal can be cleared by stabilizing the address by 15 ns and activating OE or We, but unless the TRC is satisfied, it cannot be cleared. The alarm logo is also cleared by reading or writing of the logo register, but before the reading/writing cycle and the IRQ/FT signal are cleared, the logo will not change the status.

IRQ/FT pin can also be activated in the battery power supply mode. If alerts and ABE and AE have been set, IRQ/FT will become lower. During the conversion of power, ABE and AE are cleared, but the alarm generated during the power -on period will be set up. Therefore, after the system is powered on, you can read the AF bit to determine whether the alarm is generated during the power sequence. Figure 4 shows the battery backup mode and the alarm period under power -powered.

Use the door watch dog timer

Watching dog timer can be used to detect out of control processors. Users to program the door dog timer by setting out the timeout time in the 8 -bit door dog register (address 1ff7H). Five watch dog register position BMB4 to BMB0 storage binary multiplier, two low -order RB1 to RB0 selection resolution, of which 00 1/16 seconds, 01 1/4 seconds, 10 1 second, 11 4 second. The time of the gate dog is determined by the value of the 5 -bit multiplication device and the 2 -bit resolution value. (For example: Write 00001110 3 x 1 second or 3 seconds in the door dog register.) If the processor does not reset the timer within the specified time period, set the door dog logo (WF) and generate a processor generate a processor Interrupt and keep the state of activity until you read or write to the door dog logo (WF) or the door dog register (1ff7H).

The most important position in the door dog register is to see the dog control bit (WDS). When setting to 0, when the door dog is timeout, the door dog will activate IRQ/FT output.

When the WDS is set to 1, the door dog will output the negative pulse of 40 ms to 200 ms on the RST output. When the WDS is set to 1, when the door is over time, the door dog register (1ff7H) and FT bits will be reset to 0.

When the processor executes the reading or writing of the dog register, the door dog timer reset. Then, restart the time. By writing the value of 00h to the door dog register, you can disable the watch dog timer. Watching the door dog function is automatically disabled when calling, and the dog register is cleared. If the door dog function is set to the output to IRQ/FT output and the frequency test function is activated, the door dog function is preferred and the frequency test function is rejected.

The default status of the boot

When the device is powered on, the following register position is set to 0:

WDS 0, BMB0 to BMB4 0, RB0 to RB1 0,, RB0 to 0,, RB0 to 0,, RB0 to 0, Rb1 0, AE 0, ABE 0.

Note:

1. Reference ground voltage.

2. The typical value is +25 degrees Celsius, and it is the rated value.

3. The output is opened.

4. The battery switching occurs at a position where the battery voltage or VPF is lower.

5, IRQ/FT, and RST output to leak.

6. The data retention time is+25C.

7. Each DS1556 has a built -in switch, disconnecting the lithium source before the user uses VCC for the first time. For the DIP module and PowerCap module, it is expected that TDR is defined as the accumulation time starting from the user's first power -on and without VCC.

8. RTC module (DIP) can be successfully processed through traditional wave welding technology, as long as the exposure temperature of its internal lithium energy does not exceed+85C. Without use of ultrasonic vibration, water washing technology can be used for welding.

In addition, for PowerCap:

A. Dallas Semiconductor Corporation recommends the PowerCap module base to use a welding backwaller, the label is facing the faces ( Live Bug ").

B. Manual welding and repair: Do not touch or apply the soldering iron to the wire for more than 3 seconds. During welding