Features

Allow safe insertion and removing circuit board

from 48V back panel

The circuit breaker jump and

The peak of the current

123]

The programmable surge and

short-circuit current limit needle with

LT1640L

/LT1640H compatibility

The working voltage range is -20v to----- 80V

Programmable overvoltage protection

Able -proof voltage lock

good power control output

Bell core compatible opening/level threshold

Application

Central Office Switch

-48V distributed power system

negative power control

]

LT #174; Series 4250L/LT4250H is 8 stitches. The negative 48V thermal exchange allows the controller to safely insert the circuit board from the backplane of the activity. The surge is limited to control through a transistor through the control of an external N channel. If the transistor is a low voltage threshold or greater than the overvoltage threshold if the input voltage is less than the program, it is turned off. Programmable flow limit protection to prevent short -circuit systems. After 500 microsecond timeout, the current limits the electronic circuit breaker. This PWRGD (LT4250L) or PWRGD (LT4250H) signal can be used to directly enable the power module. LT4250L is a module with low enable input and LT4250H for high -enabled input. LT4250L/LT4250H has 8 stitches PDIP and other packaging.

Absolutely maximum rated value W W U

Power voltage (VDD – V) –0.3 to 100 volts

PWRGD, PWRGD pins -0.3 volt to 100 volts [123 123 [123 ]

Induction, door sales -0.3 volts to 20 volts

UV, UV tube foot -0.3 volts to 60 volts

Drainage sales — 2V to 100V

The highest highest Jie temperature 125 degrees Celsius

Work temperature range

LT4250LC/LT4250HC 0 ° C to 70 ° C

LT4250LI/LT4250Hi — 40 ° C to 85 ° C

123] Storage temperature range -65 ° C to 150 ° C

Lead temperature (welding, 10 seconds) 300 degrees Celsius

Electric characteristics indicate specifications for the entire operation

The temperature range, otherwise the specifications are TA 25 ° C (Note 2), VDD 48V, VEE 0V, unless otherwise explained.

The electrical characteristics indicate the specification applied to the entire operation

The temperature range, otherwise the specifications are TA 25 ° C (Note 2), VDD 48V,, VDD 48V, VDD 48V, Vee 0V, unless there is another explanation.

Note 1: The absolute maximum rated value means that the life span exceeds that the device may be damaged.

Note 2: The current that enters the device pins is positive; the current of all leaving the device is positive pins. Unless there are other regulations, all voltages are specified on the benchmark.

Typical performance features

pin function

PWRGD/PWRGD (pin 1) : Good output pins. This unintellotential VDrain will lock the power supply in VDL to indicate the V -shaped V -shaped V -shaped V -shaped V -shaped V -shaped V -shaped port in VDL. This pinch can be the enable pins that are directly connected to the power module. When the discharge of the LT4250L is higher than the V -shaped or VGHPWRGD pins greater than the VDL or VGATE, it will be high impedance. Allowing the pins of the pins will be pulled to close the module. When VDrain is lower than VDL, VGATE rises to VGH, and the current of the PWRGD pins will drop to VEE, which will be locked down and open the module until the door nails pass through ultraviolet, ultraviolet rays, ultraviolet rays or electronic circuit breakers. When the drainage of the LT4250h is higher than the V -shaped than the VDL or VGATE greater than the VGHPWRGD pins, the current absorbs the current into the leakage foot module low and is forced to close. When VDrain is lower than VDL, VGATE is higher than VGH, and the PWRGD receiver current is turned off. Allowing the pull current on the module will make the pinch high and open the module. This situation is locked until the door nails pass through ultraviolet, ultraviolet, ultraviolet, or electronic circuit breaker.

pin function

OV (pin 2): simulate overvoltage input. When OV is pulled higher than the 1.255V threshold, the overvoltage conditions are detected, and the door sales will be lowered immediately. The sales will remain at a low level until OV drops to 1.235V threshold.

UV (pin 3): Simulates the under pressure input. When the ultraviolet rays are pulled to a threshold of below 1.125V, the condition is detected, and the door sales will be pulled immediately. Before the ultraviolet irradiation, the door nails will remain at a low level higher than the 1.255 threshold. UV tube foot is also used to reset electronic circuit circuit breaker. If UV tube feet have gates at the circuit breaker, the reset of the circuit breaker will occur normally. The time to respond to this pin is 1.5 microseconds. Add an external capacitor to the pin of the filtration to the pins.

V (pin 4): negative power supply voltage input. connectTo the low potential of the power supply.

Detection (pin 5): Termer detection pin. The resistor where the power path is placed between V and the power path between V and V and the current state will pull the low gate pins and adjust the voltage at both ends of the resistance of the resistor 50 millivolves. If there are more than 500 microseconds in the current conditions, the electronic circuit breaker will stick and turn off the external MOSFET. If the current limited value is set to twice the working current of the normal value, only 25 millivoltors pass the induction resistance during normal work. Disable the flow limit characteristics, V E and Sense can be short -circuited together.

Gallery (pin 6): outer grid drive output N -channel MOSFET. When the following startup conditions are met: UV tube feet are high, OV pin is low, (vSense -vee) lt; 50mv and VDD pins is greater than Vuvloh. Gate sales are sources of 45 Weian current, and 50 muman currents are pulled down. During the current restrictions, the sales were pulled down to use 100 mAh's current source.

Discost (pin 7): Simulates drain sensing input. Connect to the pins of MOSFET and V -power module. When the drainage is under the VDL, the PWRGD/PWRGD pin will be locked to open the indicator switch.

VDD (pin 8): Positive power supply voltage input. The V+pins connected to the high potential and power module connected to the power supply input. The disabled chip disabled the voltage lock circuit was disabled until the VDD pin was greater than 16V VUVLOH threshold.

Application information

Inserting the heat circuit

] When the circuit board is inserted into the 48V backplate, the wire power container module module or switching power of the circuit board power input terminal will generate huge current when charging. The transient current causes permanent damage to the circuit board component and causes the system power to fail. The LT4250 is designed to connect the power supply control voltage of the circuit board, so that the circuit board is inserted safely or removed from the backplane. The chip also offers low voltage, overvoltage and over -current keeping the power module until its input voltage is stable and within the allowable range.

Power sources

The input of the power module on the board is based on the power path (Figure 6A, all V -shaped sales of all waveforms and LT4250). R1 provides current fault detection and R2 prevent high frequency oscillation. Resistors R4, R5, and R6 provide under pressure and overvoltage sensing. Slowly increase the ratio of Q1 door, and connect to the excitation surge charging load capacitor C3. The resistor R3 and capacitor C2 are accurately controlled by the feedback network. C2 capacitors can be calculated in the following formulas: C2 (45μA CL)/IInrush

Enter the capacitor. C1 and resistor R3 prevent Q1 from opening slowly when the power pins are first contacted. If there is no C1 and R3, the capacitor C2 will drive Q1's grid maximum voltage equal to about LT4250 to power on and actively pull the low gate. The isolation of the capacitor C1 and the grid capacitance with resistance R3 is separated from the C2. The value of C1 is given by the following formula:

Among them, VTH is the smallest grid threshold of MOSFET, and VINMAX is the maximum work input voltage. R3 should not exceed R3 C2 time constant is 150 microseconds. The 1k value of R3 will ensure that the C2 value is less than 150nf. The waveform is shown in Figure 6b, and it will play a few times. When the contacts beating, the LT4250 sensor should be broken when the feet are inserted. Once the power pins stop beating, the door led foot starts to strengthen. When Q1 is turned on, the gate voltage remains unchanged by the feedback network of R3 and C2 to determine the constant. When the drain voltage has completed the slope, the door sales gradually change to its final value.

Application information

current limitation/electronic circuit breaker

LT4250 has a current limit function, which can protect and prevent short circuit or too large. Power supply current. If the current limit is activated more than 500 microseconds, the circuit breaker will stick. By placing the sensor between the sensor between VEE and Sense, the current limit is the voltage on the inductive resistance greater than 50mv. Note that the current limit threshold should be set enough to consider load current and surge. The maximum value of the surge is given below:

Among them, the 0.8 coefficient is used as the worst situation and the minimum check -up voltage (40mV). In the case of short circuits, the current restricted circuit starts and immediately pulls the gate, the servo induction voltage to 50mV, and start the 500 micrist secondary timer. This MOSFET current is limited to 50mv/rsense (see Figure 7). If the short -circuit duration exceeds 500 microseconds, the circuit disconnector will stick and lower the gate needle to turn off the MOSFET. By pulling the ultraviolet rays, resetting the circuit breaker, or circulating energy to the part. If the short -circuit is eliminated before the 500 microsecond period, the current limit will be closed and the gate will be released.

LT4250 to prevent the input terminal voltage leveling. Positive voltage level leap (increase amplitude increase) The proportional proportion of wave current and voltage conversion rate caused by the input power supply I CL △ V/△ T. If the flow exceeds 50mv/rsense, the current limit will be activated, as shown in Figure 8. The door sales are low, and the limited current is 50mv/rsense. At this level, MOSFET does not follow the power supply change due to the fast input voltage, but it still keeps stored in the load capacitance. The load capacitor starts to charge at a current of 50mV/RSENSE, but it will not be too long. As a load capacitor charge, C2 pushThe method of restricting the MOSFET current and the initial startup condition is less than the short -circuit limit of 50mv/rsense. Therefore, the circuit breaker will not trip. To ensure the correct operating voltage level under the input, RSENSE must be selected to provide current and dynamic current in the current limit of the current limit of load.

If the C2 value is less than 10NF, the input power supply may cause Q1 to temporarily turn off it to turn off the output. By adding a resistor and diode, Q1 keeps turning on during the voltage level jump. As shown in D1 and R7 in Figure 9. The purpose of D1 is in contact with the diverting current near the R7 when the power is inserted and the C1 keeps the grid. The value of R7 should be able to generate R7 C1 time constant 33 microseconds. In some cases, the output end short circuit reduces the input power to below the ultraviolet threshold. This LT4250 was closed once, and then opened until the electronic circuit breaker jumped. This can add a delay from UV to VEE by using a capacitor to add a delay from UV to VEE. This capacitor forms an RC time constant resistance under the ultraviolet rays, allowing the input power to recover before the ultraviolet needle retractor.

Application

The circuit current failure of the automatic resetting circuit breaker is shown in Figure 10. The transistor Q2 and Q3 together with R7, R8, C4 and D1 form a programmable cycle. Before the short circuit occurred, the door sales opened and Q3 opened, and the node 2 turned. The resistor R8 is turned off Q2. When the short circuit occurs, the sales are pulled down and the Q3 is closed. Nodes 2 starts charging C4 and Q2 to open, lower ultraviolet needles and reset the circuit breaker. After the C4 was fully charged, the R8 turned in the second quarter, the ultraviolet rays became higher, and the gate began to rise. Open in the third quarter and quickly pull the node 2 back to V shape. The diode D1 cutting node 3 A diode drops below V. The responsibility cycle is set to 10%to prevent Q1 from overheating.

Application information

IOU and overvoltage detection

UV (PIN 3) and OV (PIN 2) tube foot available available Provide input in the detection power supply voltage and overvoltage conditions. The internal connection of UV and OV tube feet has a lag of 130mV and 20mV, respectively. When the ultraviolet foot is lower than its threshold or the OV pin rises to the threshold, the door led foot is immediately pulled down. The sales will remain at a low position until the UV is high and OV is low. The lack of voltage and overvoltage can be programmed using a three -resistor distributor, as shown in Figure 11. When R4 549K, R5 6.49K, and R6 10K, the underwriting threshold is set to 38.5V (43V release from underwriting) and the overvoltage threshold is set to 71V. The resistor division also increases the lag in the UV pin and the OV pin input terminal of 4.5V and 1.2V, respectively. PWRGD/PWRGD output PWRGD/PWRGD output can be used as the input voltage of the module within the allowable range. LTThe PWRGD output of 4250L is used for modules with effective low enable inputs, and the PWRGD output enable input with the LT4250H with a high level module. When the drain voltage of the LT4250H is high, the Q3 of the internal transistor is turned off for VEE (Figure 12) or gate voltage, and an SAT decreases (≈0.3V) above the pwRGD pin and drainage of PWRGD. The pull current and module of the transistor Q2 receiving module are closed. When the drain voltage is lower than the VDL and gate, the voltage of the Q3 will be opened, so that the bottom of the bottom of the I1 will be discharged and Q2 will be closed. The pull -up current module is pulled up and enabled the module. When the drain voltage of the LT4250L is low, the VEE or gate voltage is low, and the internal drop -down crystalline tube Q2 is turned off. The PWRGD pin is in a high level of impedance (Figure 13). The PWRGD pin will be pulled up by the pulled current from inside the module and close the module. When the drain voltage drops lower than the VDL, the gate voltage is high, the Q2 will turn on the PWRGD pin, which will be pulled down and the module will be enabled. The PWRGD signal can also be used to open the LED or optical isolationer to indicate that the power supply is good, as shown in FIG. 14. The door foot voltage adjustment When the power supply voltage of the chip is greater than 20V, the pipe foot voltage is adjusted at 13.5V above V. When the voltage of the gate power rises, the voltage is not greater than 18V to 80 volts.