EL9111, EL9112 i...

  • 2022-09-20 05:00:00

EL9111, EL9112 is a three -channel difference receiver and equalizer

Features

150MHz-3DB bandwidth

5 compensation

-500 Hz@1000 feet

- 125MHz@500 feet

108MA power supply current

Differential input range 3.2V

Common model input range -4v to+ 3.5V

± 5V power supply

output to the power supply within 1.5V

123] Provide lead (in line with RoHS)

Application

twisted wire receiving/equalizer

kvm (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard (keyboard /Video/Mouse)

VGA on the twisted line

Security Video

3 Differential receiver/equalizer

EL9111

and EL91112 are three -channel differences receivers and equilibrators. They include three high -speed differential receivers and five programmable poles. The output of these polar blocks is then added to the output buffer. The equilibrium length is set by voltage on a single tube foot. EL9111 and EL9112 also contain a 3-Statable output, enabling multiple devices to connect parallel and use in multiple reuse applications.

The gain can adjust 6DB up and down through its VGAIN control signal on each channel. In addition, you can switch the gain of 6DB to provide a matching drive to the cable.

The bandwidth of EL9111 and EL91112 is 150MHz, which consumes only 108mA on the ± 5V power supply. The single input voltage is used to set the compensation level of the required cable length.

EL91111 is a special version of EL91112. It decodes the synchronization from EL4543 to the public mode of three pairs of CAT-5 cables.

EL9111 and EL91112 are encapsulated with 28-pin QFN, and it is specified in the temperature range of -40 ° C to+85 ° C.

pinouts

Typical performance curve

123]

Application information Logic control EL9112 has two logical input pins, chip enable (enable) and switching gain (X2). The nominal threshold of all logical circuits is 1.1V higher than the potential of the logic reference pin (VREF). In most applications, the chip is expected to run from+5V, 0V, -5V power systems and logic running between 0V and+5V. In this case, the logical reference voltage should be connected to the 0V power supply. If logical reference to -5V orbit, logical reference should be connected to -5V. The logical reference of the source of the tube is about 60 Weire. If all inputs are true (positive), this will rise to about 200 Weire.

When they remain in logical reference electricity, logical input all sources of up to 10 Weire. When it takes positive, the input terminal receives a current that depends on high levels. For high level 5V, the current is as high as 50 Weire, which is higher than the reference level.

If you do not use logic input, it should be connected to the appropriate voltage to define its state.

Control reference and signal reference

You need to simulate the control voltage to set the balancer and contrast level. These signals are voltage within the range of 0V-1V, reference control reference pins. The control reference pin is expected to be connected to 0V, and the control voltage will change from 0V to 1V. However, any potential between -5V and 0V that controls the reference pins to the control voltage is acceptable.

The control voltage pin itself is high impedance. According to the controlling voltage applied, the control reference pins will be powered between 0 Wei'an and 200 Weire.

Control reference and logical reference effectively eliminating the necessity of 0V orbit, and can only run within the range of ± 5V (or 0V and 10V). However, we still need further reference to define the 0V level of single -end output signals. The reference of the output signal is provided by the 0V pin. The output level cannot be pulled down or down to any power supply, so it is important that the location of the reference point should be allowed to be fully output. 0V reference voltage should be connected to quiet ground "