Features

150MHz-3DB bandwidth

5 compensation

-75MHz@1000 feet

-125 MMS@500 feet

33 mAh power supply current

Differential input range 3.2V

common mode input range ± 4.5 V

± 5V power supply

output to within 1.5V

] Provide lead -free (conforms to ROHS)

Application

double twisted line receiving/equalizer

kvm (keyboard/ Video/mouse)

VGA

Security Video

Machine/Equalist

EL9110

is a single channel differential receiver and equalizer. It contains a high -speed differential receiver and 5 programmable poles. The output of these polar blocks is then added to the output buffer. The equilibrium length is set by voltage on a single tube foot. EL9110 also contains a three -stable output that enables multiple devices to connect parallel and use in multiple reuse applications.

The gain can be adjusted up and down through the VGAIN control signal 6DB. In addition, you can switch the gain of 6DB to provide a matching drive to the cable.

The bandwidth of EL9110 is 150MHz, which consumes only 33mA on the ± 5V power supply. The single input voltage is used to set the compensation level of the required cable length.

EL9110 can be used in the 16 LD QSOP packaging and is specified in the temperature range of -40 ° C to+85 ° C.

Order information

*The specifications of the volume for details, see TB347.

Note: These Intersil lead-free plastic packaging products use a special lead-free material group; mold/mold connection material and 100%matte tin panel to increase the fire-E3 final decoration, which meets the ROHS standard, and and with SNPB and lead -free welding operations are compatible. The lead-free product is classified as MSL under the peak of lead-free return welding, which meets or exceeded the lead-free requirements of IPC/JEDEC J STD-020.

pinout

Typical performance curve

Application logical control

EL9110 There are three logical input pins, chip enable (ENBL), co -mode extension (CMEXT), and switching gain (X2). The nominal threshold of the logical circuit is 1.1V higher than the potential of the logical reference pin. In most applications, the chip is expected to run from+5V, 0V, -5V power systems and logic running between 0V and+5V. In this case, the logical reference voltage should be connected to the 0V power supply. If logical reference to -5V orbit, logical reference should be connected to -5V. The logical reference of the source of the tube is about 60 Weire. If all inputs are true (positive), this will rise to about 200 Weire.

When they remain in logical reference electricity, logical input all sources of up to 10 Weire. When it takes positive, the input terminal receives a current that depends on high levels. For high level 5V, the current is as high as 50 Weire, which is higher than the reference level.

If you do not use logic input, it should be connected to the appropriate voltage to define its state.

Control reference and signal reference

You need to simulate the control voltage to set the balancer and contrast level. These signals are voltage within 0V to 1V, reference control reference pins. The control reference pin is expected to be connected to 0V, and the control voltage will change from 0V to 1V. However, any potential between -5V and 0V that controls the reference pins to the control voltage is acceptable.

The control voltage pin itself is high impedance. According to the controlling voltage applied, the control reference pins will be powered between 0 Wei'an and 200 Weire.

Control reference and logical reference effectively eliminating the necessity of 0V orbit, and can only run within the range of ± 5V (or 0V and 10V). However, we still need further reference to define the 0V level of single -end output signals. The reference of the output signal is provided by the 0V pin. The output level cannot be pulled down or down to any power supply, so it is important that the location of the reference point should be allowed to be fully output. 0V reference voltage should be connected to quiet ground "