CS5106 is a multif...

  • 2022-09-20 05:00:00

CS5106 is a multifunctional synchronous additional auxiliary PWM controller

Features

* The programmable fixed frequency

* The programmable FET non -overlapping

*[ 123] Enable wire

* 12V fixed auxiliary power supply control

* Impurd and overdoltage

]*

The output owed pressure protection of the timer

*

The main clock synchronization ability *

Synchronous frequency range detection [123 ]

* 80NS pulse width modulation delay

* 20 mAh 5 volts reference output

* Small 24 guide SSOP packaging

*

Controlling hiccup

Program package option

Instructions

CS5106

is a fixed -frequency current mode controller single NFET driver and a dual FET synchronization drive. Synchronous drives can improve the power -level efficiency of the main and other power. A single drive allows designers to develop auxiliary power supply for controller power and secondary indoor maintenance. In addition, because the synchronous drive has a programmable field effects crystal (FET) non -overlap, CS5106 is an ideal controller for soft switching converters.

CS5106 is specifically designed for isolation topology. Flexibility, reducing dimensions and reducing the number of parts are required. The controller contains the following characteristics: under pressure stop, overvoltage stop, programming frequency, programmable synchronous non -overlapping time, the mainstoror clock frequency range detection, enabled, output arrears protection timer, 20 mAh 5 volts output, 80 80, 80 The modulation of the pulse width is delayed to control the hiccup mode.

The connection temperature and power supply range of CS5106 are -40 ° C ~ 125 ° C and 9V ~ 16V, respectively, and can be used in 24 guide SSOP packaging.

Application Relationship Figure

48V to 3.3V positive fiery variable replacement with a synchronous rectifier

Block figure

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Application theory

Operation theory

Power on integrated circuit

Integrated circuit has a power supply, VCC and a ground wire. If VSS is used for self -use power supply, the diode between VSS and VCC is positive bias, and IC will get its power from VSS. Internal logic monitoring power supply voltage VCC. Under abnormal operating conditions, all gate drivers remain in a low state. CS5106 requires 1.5mA rated start -up current.

Start

Assuming that the parts are enabled and there is no overvoltage or underwriting failure. In addition, assuming all theuxiliary and mainstream output voltage starts from 0V. 8V Zina's reference power supply is usually applied to VCC. When VCC exceeds 7.5V, the 5V reference voltage is enabled, and OSC starts to switch. If the V5Ref wire does not have an excessive load, so that the v5ref lt; 4.5V nominal value, the VREFOK will become higher and RUN1 will become higher, which will release GATE1 from a low state. After the release of Gate1, it began to switch according to the conditions of the auxiliary control circuit and the auxiliary power supply setting, and VSS began to rise. When VSS GT; VCC+V (D1), P1 is opened, RUN2 becomes higher, and Gate2 and Gate2B are released from low. Gate2 and Gate2b start switching according to the conditions set by the main control loop, and the main theme output begins to rise. See the boot waveform in FIG. 1.

Soft start

The soft start of the auxiliary power supply is achieved by placing a capacitor between Oaout and ground. The rated source current of the error amplifier is 200A, which is very suitable for setting the soft startup conditions of the auxiliary regulator. Pay attention to ensure that the soft start time requirements are not conflicted with any transient load requirements of the auxiliary power supply, because the large capacitance on Oaout will slow down the ring response. In addition, a soft startup capacitor must be selected so that both outputs will enter the adjustment state before the delayed timer sticks to during the start or restart process. The soft start of the main power supply is completed by charging the soft startup capacitor C6 to D5 and R7 when starting. After the main power supply enters the adjustment, the C6 continues to charge, and the D8 is disconnected from the feedback loop.

Voltage and current slope PWM comparator input (VFB1, 2 and RAMP1, 2 wires)

C10 and C11 are PWM comparison with the main power supply PWM comparison Instrument. The feedback voltage (VFB) is divided by 3 and compared with the linear voltage representation (RAMP) of the transformer at one side current. When the output of the feedback comparator becomes high, the reset signal is sent to the PWM trigger, and the gate drive is driven to a low level. The 130mv offset on the ramp is allowed to enter a 0%duty cycle in the case of light load.

The feedback voltage of the Gate1 driver (VFB1)

Generally, the output of the auxiliary error placing the large device (A1) is connected to the VFB1. The fixed 1.2V reference voltage on the 10: 1 resistor and the error amplifier on the negative input of the large input of the large input is programmed, and the VSS output is programmed to 12V.

Pulse overcurrent protection and snoring mode (ILIM1,2 lead)

C12And C13 is a comparator of the auxiliary and main power challenge current. When the current on the side of the transformer increases to the voltage on the current detection resistor exceeding 1.2V nominal value, the output of the current limit comparator becomes higher, and the reset signal is sent to the PWM trigger. The grid drive is driven low.

C16 and C17 are the second threshold, which is used to auxiliary and main power supply -by -pulse current limit comparators. If the current on the side of the transformer grows so fast, the current detection voltage is not limited by the C12 or C13, and the voltage on the current detection of the resistor exceeds 1.4V. The polar driver level becomes lower and keeps low in the next two clock cycles.

IOU and overvoltage threshold

C5 and C8 are under pressure and overvoltage detectors. Generally, these inputs are connected through the intermediate resistance in the three -resistor division, the top resistance is connected to the vehicle identification number, and the bottom resistance is connected to the ground. The underwriter has a built -in lagging of 200 millival, which is directly input from the UVSD wire. The positive input of the underwriter comparator is 5V, and the negative input of the overvoltage comparator is 5V. The output of the two comparators is multiplied at the (G4) and the current and enable input. The output of G4 will send the input feed to the fault lock memory (F2).

Planning and enabled potential customers

Program wire control to control the polarity of the capable wire. If the program guide is high or floating, if the enable input is high or floating, the door output will turn lower. If the program guide is low, if the input system is low, the door output will become low. If the output is switched to low, the part is enabled, and the part will be restarted according to the process of the summary of the Start " section.

Failure logic

If VREF