General instructions

LP3982 Low pressure difference (LDO) CMOS linear stabilizer provides 1.8V, 2.5V, 2.77V, 2.82V, 3.0V, 3.3V and adjustable versions Essence They provide 300 mAh output current. Packaging is aging in 8 -needle MSOP. LP3982 is compatible with the pins and packaging with Maxim's MAX8860 . LM3982 can also be packaged in small footprint limited liability partnerships. LP3982 is suitable for battery power supply applications, because of its closure mode (1NA), low static current (90 micro -safety), and LDO voltage (120mv typical). The low voltage difference allows to end the voltage by running close to its life. The PMOS output transistor of LP3982 is relatively non -consuming drive current compared with the PNP LDO regulator. This PMOS regulator is a stable small ceramic capacitor load (a typical value of 2.2 μF). These devices also include regulating fault detection band gap base voltage, constant current restriction and heat overload protection.

Features

MAX8860 needle, compatible packaging and specifications

LLP saving space package

300mA guaranteed output current

120MV typical voltage drop @300ma

90 Weisan typical static current

1NA typical shutdown mode

60db typical PSRR

2.5V to 6V input range

] 120 microsecond Typical opening time Small ceramic output capacitance stable

37 μV RMS output voltage noise (10Hz to 100kHz)

overcurrent protection

± 2%output Voltage tolerance

Application

Wireless mobile phone

Digital signal processor core power

Electronic equipment for battery power supply

Portable information equipment [ 123]

Absolutely maximum rated value (Note 1, 2)

Vehicle identification number, vehicle identification number, vehicle identification number, vehicle identification number, vehicle control number, vehicle failure code -0.3 volts to 6.5 to 6.5 3

Failor exchange current 20mA

Power consumption (Note 3)

Storage temperature range -65 ° C to 160 ° C

end Warm (TJ) 150 ° C

The temperature of the lead (10 seconds) 260 degrees Celsius

Static discharge rated value

Human model (Note 6) 2KV

Machine model 200V

Thermal resistance (θja)

8 -needle MSOP 223∏C/W

8 -needle LLP (Note 3)

Work Rating (Note 1), (Note 2)

Temperature temperature Range -40 ° C to 85 ° C

Power supply voltage 2.5V to 6.0V

Electric characteristics

Unless there are other regulations, all the guarantees are: vehicles Identification number VO+0.5V (Note 7), vehicle recognition number vehicle identification number, CIN COUT 2.2μF, CCC 33NF, TJ 25 303C. Black body restrictions are suitable for extreme working temperature: – 40 303C and 85 303C.

Electrical characteristics (continued)

Note 1: Absolute maximum rated value indicates the limit of damage. When operating equipment outside, the electrical specifications are not applicable to the rated working conditions.

Note 2: All voltage is related to the potential of the ground pins.

Note 3: The maximum power consumption of the device uses the following formula calculations: In the formula of

, TJ (MAX) is the maximum knot temperature, TA is the ambient temperature, and θja is the temperature of the environmental thermal resistance. E, g. For msop-8 packaging θja 223 degrees C/W, TJ (MAX) 150 degrees C, use TA 25 degrees C, and the maximum power consumption is 561MW. The reduction coefficient (-1/θja) -4.5 MW/degrees Celsius, so below 25 degrees Celsius, the power consumption number can increase by 4.5 MW per degree Celsius, and at the temperature above 25 degrees Celsius, similarity will be due to this due to this due to this. The θja that reduces the LLP packaging depends on the area of the PCB trace line, the trace line materials, the number of layers, and the heating hole. In order to improve the resistance and power consumption of the temperature LLP packaging, please refer to the application annotation AN-1187.

Note 4: Typical values represent the most likely parameter model.

Note 5: All limits are guaranteed by testing or statistical analysis.

Note 6: Human model: 1.5kΩ connects 100pf.

Note 7: Conditions are not suitable for input voltage below 2.5V, because this is the minimum input working voltage.

Note 8: The attenuation voltage is measured by reducing the vehicle recognition number until the vehicle recognition number decreases 100 millivolves from the nominal value, and the vehicle recognition number-vehicle identification number 0.5 volts. The attenuation voltage is not suitable for version 1.8.

Note 9: For fixed versions, there is no external connection.

Note 10: The fault detection voltage is specified for the difference between the input and output voltage. Under the voltage difference, the fault pins becomes a low activation state.

Typical performance characteristics, unless there are other regulations, vehicle identification number VO+0.5V, CI, CIN Cout 2.2 μF, CCC 33nf, TJ 25 ℉, vshdn vin.

Typical performance characteristics, unless there are other regulations, vehicle identification number VO+0.5V, CIN COUT 2.2μF, CCC 33nf, TJ 25 ℉, vshdn Vin. (Continued)

Application information General information

LP3982 and Maxim's MAX8860 Including reverse battery protection and dual -mode #8482; functions (fixed and adjustable combinations). Figure 1 shows the function box diagram of LP3982. 1.25V gap benchmark, error amplifier, and PMOS The topology structure of a typical negative from output to one of the error inputs through the transistor of the transistor is closed, faulty and normal temperature and current protection circuit regulator. The feedback resistor R1 and R2 are inside or outside the integrated circuit, depending on whether it is a fixed voltage or adjustable type. The negative feedback and high -opening gains of the error leaving the large -band caused the two inputs of the error amplifier. If the output voltage changes due to changes in the load, the error amplifier provides the channel to provide appropriate drive crystal pipes to keep the error input equality. In short, the error placed in the large -scale maintenance of the output voltage constant to maintain its input equal.

Output voltage settings (only ADJ version)

The output voltage is set according to the negative feedback amount (note that the general pipe will reverse the feedback signal To. Figure 2 simplifies the topological structure of LP3982. This regulator can be used to indicate the configuration of the non -inverter and the fixed DC voltage (VREF) input signal. Its peculiar op amp is its large output transistor, only the source. As far as its non -turning configuration is concerned, the output voltage is equal to VREF multiplied by a closed -loop gain:

Use the following formula to adjust the output to a specific voltage:

Select R2 100K , Optimize accuracy, power range, noise and power consumption.

The output capacity of the operation amplifier is similar and linear regulator. Just as the rail -to -rail passing operation amplifier allows its output voltage to approach the power voltage, and the low voltage differential voltage voltage (LDO) allows its output voltage to work at a position near the input voltage. Both are configuration of the transistor. Standard operational amplifier regulator output in the output transistor. The leakage (or electrode of the electrode) of the transistor is output to the rail transportation amplifier and the LDO regulator output. This replaces the output with less restrictions on the drain (or VSAT). Of course, this is a balance. The output impedance increases significantly, so when combined with the capacitance load, the magnetic pole is reduced. That's why rail -to -track transportationThe amplifier is usually poorly loaded in the driver capacitor and recommends a series output resistor. LDO requires the same series resistance, except for the internal resistance of the output capacitor.

Output capacitance

LP3982 specially designed to use ceramic output capacitors as low as 2.2 μF. The following is a ceramic capacitor 10 μF can significantly save costs and space, while high -frequency noise filtering. Higher values and other types can also use capacitors, but its equivalent series resistance (ESR) should be maintained below 0.5Ω to provide the following media types that meet the requirements of LP3982: Z5U, Y5V, X5R, X7R.Z5U and Y5V types Show 50%or more decreased electricity values as the temperature rises from 25 ° C, an important consideration. X5R usually maintains the capacitor value within ± 20%. The X7R type is ideal because they can withstand 10%high temperature

Ceramic capacitors are facing challenges due to their relatively low ESR. Like most other LDOs, LP3982 relies on the phase bias of the feedback circuit in the zero -point regulator in the frequency response. If the phase shift reaches 360 degrees (that is, it becomes positive), the regulator will oscillate. This compensation usually exists in the zero point generated by the output capacitor combination with an equivalent series resistance (ESR). Zero is to eliminate the parallel combination (RO) regulator of load capacitors (CL) and load resistance (RL) and output resistance. The challenge capacitor brought by the low blood is that the zero point it produces may be too high. This LP3982 is zero through the internal generation strategic position.

FIG. 3 Display the basic model of the linear regulator to help describe the actual situation of the output signal through its feedback cycle; that is, describing its ring road Gain (LG). LG includes two main transmission functions: error amplifier and load. The error amplifier provides voltage gain and main poles, and the load provides zero and one pole. The LG of the model is described in Figure 3:

The first item of the above equation represents voltage gain (molecular) and single pole (divorce) error amplifier. The second item represents zero (molecule) and load pole (divorce), combined with the RO of the regulator. Figure 4 shows that the zero is too high in the contribution of the load, which cannot offset the pole of load and reverse osmosis. The solid line displays the cycle gain, and the dotted line displays the corresponding phase shift. Note that the phase movement at the unit gain is 360 degrees, which is the standard for oscillation.

LP3982 generates an internal zero, which is used to compensate for low -zero points of high zero points for low ESR ceramic output capacitors. This internal zero is strategically placed by the positive phase movement near the unit gain, thereby providing a stable phase habow. Under the condition of empty load stability, LP3982 maintains the necessary characteristics of stable CMOS RAM to maintain an effective application. Enter capacitor LP3982The minimum input capacitor is about 1 μF. This value can increase indefinitely. Type is not essential for stability. However, the workbench may have unstable devices that use long power cords, especially when they are close to dropout and high current conditions. This is due to the oxides of the output tube through the grid to the output end of the output end; therefore, a pseudo -LCR ring network gain. A 10μF 电 电 input capacitor can solve this non -original condition; its larger ESR acts to inhibit the pseudo -LCR network. This may only be necessary for some bench settings. 1 μF ceramic input capacitor is suitable for most terminal applications. If 钽 Input a capacitor for final application, it must consider the trend circuit mode of failure in a short period of time, so it may damage the parts.

Noise bypass electrical container

Noise bypass power container (CC) significantly reduced the noise of output LP3982. It is connected between the pin 6 and the ground. The best value of CC is 33NF. Put the foot 6 directly to the band gap. The DC leakage of the capacitor should be considered; loading the reference voltage will reduce the output voltage. NPO and COG ceramic capacitors usually provide very low leaks. Polypropylene and polycarbonate film car Bonat capacitors provide lower leakage current. CC does not affect the transient response; but it affects the boot time. The smaller the CC value, the boot time.

Power consumption

Power dissipation means that the capacity of components is away from silicon, and packaging is a key factor. A reasonable analogy is a possible packaging of human beings, such as jackets. The jacket makes people feel comfortable in cold weather, but it is not so comfortable in hot weather. If this person is exercising power (exercise). This is because the jacket has a resistance heat flow to the external environment, just like IC packaging from its connection point to the surrounding environment. θja is the temperature unit of the unit power. It can be used to calculate the knot temperature of the IC as follows: TJ θJa (PD)+TA TJ is the knot temperature of the integrated circuit. θJa is a resistance from the connection to the external environment of air. PD is the power applied by an integrated circuit, and the TA is the ambient temperature. PD calculation is as follows: pd LP3982 packaging (MSOP-8) iOUT (VIN-VO) θJa is 223 ° C/W, no mandatory air flow, 182 ° C/W, 225 linear (LFPM) air flow per minute, 163 ℃/W, 500 LFPM air flow, and 149 ° C/W, airflow 900 LFPM.

θja can also consider the PC board layout: the heavy line (especially in the vehicle identification number and two opening sales), large planes, and pores. The improvement and absolute measurement of θJa-CAN

The use of the heat clearance circuit is estimated to be inside the integrated circuit. The device of the heating passage transistor transistor should be 160 degrees Celsius (typical values) when its knotting temperature reaches 160 degrees Celsius (typical values). The electrical transistor does not drive again until the knot temperature drops about 10 degrees Celsius (Hys Teresis) (Hys Teresis)Essence Using the heat shutdown circuit estimate, θJa can be shown below: In the case of low input output voltage difference, the load current is set to 300 mAh. Add input voltage until the heat shutdown starts the circular switch. Then slowly reduce the vehicle identification number (100mv increment) until the part keeps opening. The voltage difference (VD) generated by the record is used for the following equations

Fault detection

LP3982 provides a fault -to -foot current limit and heat that becomes lower during the output process. Trimming and other adjustment conditions, or when it is close to decline. The latter monitor the input output voltage difference and perform a threshold that is relatively higher than the voltage drop. This threshold also tracks the voltage reduction load current when the voltage changes. See the typical section of the typical feature segment of fault detection and load current. The fault pins require a pull -up resistor because it is a leakage output. The value of this resistor should be large enough to reduce energy consumption. 100kΩ pull -up resistor is suitable for most applications. Figure 5 shows the LP3985, and the failure increases the reset pin of the delayed microprocessor. The output comparator fails in the regulator.

The reset delay time of the application is set to 8.8ms. Note that the comparator should have high impedance inputs to prevent VREF on the CC pin of LP3982.

Close

When the SHDN tube is in, LP3982 enters the state of low dormant mode logic. In this case, the filter, error amplifier and band gap are closed, reducing the provision of 1NA standard current. The highest guarantee of SHDN pin logic is 0.4V. The guarantee voltage of the minimum value SHDN pins will return LP3982. The SHDN pin can be connected directly to maintaining this role. The SHDN pin may exceed the vehicle identification number, but it cannot exceed the maximum value of ABS is 6.5V. Figure 6 shows applications using SHDN PIN. It detects whether the battery power is too low and disconnect the load off the regulator. Microblagia comparison (LMC7215) and reference (LM385) are combined with resistance to set the minimum battery voltage. At least the battery voltage, the output of the comparator becomes lower and turn off the LP3982 and the corresponding load. The lag increases to the minimum battery threshold condition that prevents the battery recovery voltage error than the minimum value. When the load is disconnected from the battery, the infrared drop of the internal resistance is reduced. The detection threshold of the battery detector in the minimum value Figure 6 is low (VLT) 3.6 volt, which is equivalent to the minimum battery voltage. The upper limit (VUT) is set to 4.6V to exceed the recovery voltage of the battery

The resistance value of VUT and VLT is determined as follows

The above procedure assumes that the railway outputs the railway output. Basically, at a lower threshold, the upper limit of the parallel threshold of R2 and R3. Please note that the application requires the same goal input. pictureThe resistance value shown is the actual value of the closest calculation value.Quickly start LP3982 to provide a better system with fast start time efficiency.Use optional noise bypass power containers.The internal 500 Weian current power supply charge the capacitor until the capacitor reaches about 90%of its final value.