XC7K160T-2FBG484I_AD2019BRZ Introduction

Not only does machine learning help improve QoR, it also reduces compile times and predicts and accelerates design closure strategies based on design patterns. Studies have shown a 10% improvement in QoR over the original compared to traditional EDA algorithms.

Despite the gradual slowdown of Moore's Law, the exponential growth in FPGA transistor counts over the past 20+ years has not diminished. EDA has long faced various challenges: the number of devices is increasing and the design is getting more complex.

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This has also led to a variety of design methods, the richness of which even exceeds the number of atoms in the universe. In other words, playing EDA is much harder than playing Go.

Therefore, the trade-off often faced in EDA is between compile time and QoR. To make matters worse, the optimization algorithm itself is polynomial and can fluctuate exponentially with the size of the design.

relevant information