General description

lmc6032 is a CMOS dual operation amplifier that can run from a single power or dual power supply. Its performance characteristics include the input -concludes of grounding, low input bias current, and high voltage into real loads, such as 2 kΩ and 600 ω. This chip is a national advanced bisodiacum CMOS process. See the LMC6034 data table to understand the amplifier with the same function of the CMOS four -yuan operation. For higher performance characteristics, please refer to LMC662.

Features

Specifying for 2 kΩ and 600Ω load

High -voltage gain: 126 decibel

low offset voltage drift: 2.3 Micro Voltage/Celsius

Ultra -low input bias current: 40FA

Input common modular range includes V # 8722 from+5V to+15V power supply; N work Scope

ISS 400 Micro An/amplifier; independent of V+N Low distortion: 0.01%at 10 kHz

conversion rate: 1.1V/microsecond

Compared TLC272 improved performance

Application

High impedance buffer or front placement big device

current voltage converter

Long -term integralizer

Sampling maintenance circuit

Medical equipment

Absolute maximum rated value (Note 1)

If you need military/ Aerospace equipment,

Please contact the National Semiconductor Sales Office/

The availability and specifications of dealers.

Differential input voltage ± power voltage

Power supply voltage (V+--V negative electrode) 16 volts

output to V+short circuit (note 10)

output pair pair V-short circuit (Note 2) Lead temperature

(welding, 10 seconds) 260 Celsius

The storage temperature range is -65 ℃ ～+150 ℃

[

[ 123] Jacking temperature 150 303C

ESD tolerance (Note 4) 1000V

Power consumption (Note 3)

Output/input pin voltage ( V +) + 0.3 volts, (伏-) 0.3 volts

output pin current ± 18 mAh

Input pin current ± 5 mia

A current with a power pins of 35 mAh

Working rated value (Note 1)

The temperature range 40 303C≤TJ≤+85 303C

Power voltage range 4.75 to 15.5 volts

Power Consumption (Note 11)

Thermal resistance (θja), (Note 12)

8 -needle dipped in 101 ° C/w

8 -needle so 165 ° C/W

DC Phase Feelability

Unless there are other regulations, all the limits of TJ 25 degrees Celsius are guaranteed. Black body limit is suitable for extreme temperature. V+ 5 volts, V- ground 0V, VCM 1.5 volts, vouchers 2.5 volts and RL GT; 1M, unless there are other regulations.

AC electrical characteristics

Unless there are other regulations, all the limits of TJ 25 degrees Celsius are guaranteed. Black body limit is suitable for extreme temperature. V+ 5 volts, v- ground 0V, VCM 1.5V, vout 2.5V, RL GT; 1m, unless there are other regulations.

Note 1: Absolute maximum rated value indicates the limit that the component may be damaged. When the working rated value indicates that the device is in a state, the device tends to work normally, but it does not guarantee specific performance restrictions. Please refer to the electrical characteristics of the guarantee specifications and test conditions. This guarantee specification is only applicable to the test conditions listed.

Note 2: Applicable to the operation of single power and division. The continuous short -circuit operation of the increase in ambient temperature and/or multiple computing amplifiers may cause a maximum allowable permission temperature to be 150 ° C. Long -term output current exceeding ± 30 mA can adversely affect reliability.

Note 3: The maximum power consumption is the functions of TJ (MAX), θJa, and TA. The maximum allowable power consumption at any ambient temperature is pd (TJ (MAX) – TA)/θJa.

Note 4: Human model, 100 PF passes through 1.5 kΩ resistance.

Note 5: Typical values represent the most likely parameter model.

Note 6: All limit is guaranteed at room temperature (standard surface) or extreme operating temperature (thick body surface).

Note 7: V+ 15V, VCM 7.5V, RL connected 7.5V, source pole test 7.5V ≤VO ≤ 11.5V, sinking test 2.5V ≤VO ≤ 7.5V.

Note 8: V+ 15V. As a voltage follower connection, there is a 10V step input. The specified number is the slower in the positive and negative conversion rate.

Note 9: Reference input. V+ 15V and RL 10kΩ are connected to V+/2. Each amplifier is motivated in sequence at a frequency of 1kHz, generating VO 13VPP.

Note 10: When V+greater than 13V or reliability may be adversely affected, do not connect the output to V+.

Note 11: For equipment running at high temperatures, it must be reduced according to the thermal resistance θja of PD (TJ TA)/θJa.

Note 12: All numbers are suitable for packaging directly welded to the PC board.

Typical performance features 7.5 volts TA 25-C, unless there are other regulations

Program prompt

The amplifier topology

The topology structure selected for LMC6032 is not used in Figure 1 (compared to general operational amplifiers) does not use traditional unit gain buffer output levels; on the contrary, the output is directly taken from the integralizer directly from the points device The output is allowed to allow a larger output. Because the buffer must be able to withstand the gain and stability of the high -transportation amplifier, these tasks must now be responsible for the railway. Due to these requirements, the integrator is an event in the phase of a complex and an embedded gain. This stage is a dual -feed (CF and CFF) compensation through a dedicated unit gain. In addition, the output part of the integral device is push -pull configuration for transporting heavy objects. When the entire amplifier path of the absorption current is the stage of obtaining first -level feedback, the source path contains four gain stages and two FED forward places.

Traditional bipolar operational amplifier, even if the load is 600Ω. The gain at the time of sink is higher than that of most CMOS computing amplifiers to the additional gain stage; however, the gain (600Ω) gain will be reduced, such as the characteristics shown in the electrical diagram. The high input resistance of the compensation input capacitance LMC6032 operational amplifier allows the use of large feedback and source resistance values to lose the gain accuracy due to loading. However, the circuit will be used as a large value to use the resistor. Each amplifier has some capacitors between each input end and the difference capacitors between the grounding and the input end. When the amplifier is resistant, the input capacitor (and the additional capacitor sockets generated by the circuit board traces, etc.) and the feedback resistor are on the feedback path. In the following universal computing amplifier circuit, Figure 2, the frequency of this pole is

. Any amplifier capacitance, circuit board trajectory, etc., RPIS is a parallel combination of RF and RIN. This formula and all formulas derived below are suitable for vertical and non -inverse operational amplifiers configuration. The frequency of feedback poles when the feedback resistance is less than a few KΩ, because CSIS is generally less than 10 PF. If the frequency of the feedback is far higher than the ideal " closed -loop bandwidth (the nominal closed -loop bandwidth of the CS)