Description

UCC3808 is a family of BICMOS push, high -speed, low power consumption, pulse width modulator family. UCC3808 contains the least number of controls and driving circuits with the smallest power supply required for offline or DC-DC fixed frequency current mode switching.

UCC3808 dual output drive level is arranged by push -pull configuration. Both output switches are using the oscillator frequency of the trigger. The dead zone between the two outputs is usually 60 ns to 200 NS depending on the value of the timer capacitor and resistor, so the duty occupation ratio of each output level is limited to less than 50%. (Continuous)

Pipe instructions

Company: COMP is the output of error amplifier and the input of PWM comparators. The error amplifier in UCC3808 is a real low -output impedance, 2 MBH, an operational amplifier. Therefore, the COMP foot can be both source current or exchange current. However, the internal current of the error amplifier is limited, so the zero occupation ratio can be forced by pulling the COMP to the GND.

The UCC3808 series has a built -in full -cycle soft startup function. Soft start is achieved as a clamp as the maximum compensation voltage.

Anti -terrorist elite: Input to PWM, peak current, and overcurrent comparator. Excessive current comparators are only used for fault detection. Excessive current threshold will cause a soft start cycle.

Federal Survey Bureau: Reverse input of errors. In order to obtain the best stability, the length of the FB lead as much as possible and the smaller FB messy capacitance.

The ground: Reference ground and power ground for all functions. Due to the high current and high -frequency operations of UCC3808, it is strongly recommended to use a low impedance circuit board ground plane.

OUTA and OUTB: AC large current output level. Both stages can drive the grid of MOSFET. Each level can generate a 500 mAh peak source current and the peak exchange current of 1 security.

In the push -pull configuration, the output stage switches at half of the frequency of an oscillator. When the voltage on the RC pin increases, one of the two outputs is high, but during the decline, both outputs are closed. The dead time between the two outputs and the rising time of the slow output than the decrease time ensure that the two outputs cannot be opened at the same time. The time of the dead area is usually 60 ns to 200 ns, depending on the value of timer capacitors and resistors.

The large current output drive is composed of MOSFET output devices, and the output device is converted from VDD to GND. Each output level also provides a very low impedance to overwhelm down. This means that in many cases, there is no need for external sketch clamping diode.

Reinforced concrete: oscillator programming tube. The oscillator of UCC3808 tracks VDD and G internallyND, so changes in the power rail have the least effect on frequency stability. Figure 1 shows the oscillator box diagram.

Only two components are required for oscillator programming: one resistor (connected to VDD and RC) and a capacitor (connected to RC and GND). The frequency of the similar oscillator is determined by the simple formula below:

Among the frequencies in Hertz, the resistance is based on Ohm, and the capacitance is in Fara. The recommended timing resistor range is between 10 kΩ and 200 kΩ, and the range capacitor range is between 100 PF and 1000 PF. The timing resistor should be avoided by less than 10 kΩ.

In order to obtain the best performance, the time -time capacitor lead should be connected to GND as much as possible, connecting the VDD's timing transmission line to the VDD, and connecting the lead between the timing components and the RC to RC. Encourage separate grounding and VDD tracking of external timing networks.

Video display: The power input connection of this device. Although the static VDD current is very low, the total power supply will be higher, depending on the OUTA and OUTB current and the frequency of programming oscillator. The total VDD current is the sum of static VDD current and the sum of the average output current. It is known that the operating frequency and MOSFET gate charge (QG), the average output current can be calculated from the following formulas

In order to prevent noise, the VDD bypass to GND can be used to use the ceramic capacitors and electrolytic capacitors closer to the chip as close to the chip. It is recommended to use 1 μF decoupling capacitors.

Pin instructions (continued)