General description

w78e058 B is an 8 -bit microcontroller, which has a programmable flash memory EPROM for firmware update. The instruction set of W78E058B is completely compatible with the standard 8052.

W78E058B contains a 32K byte main ROM and a 4K byte auxiliary ROM, which allows the content of 32KB main ROM Eight -bit two -way and bites can address I/O ports; 4 -bit port P4; three 16 -bit timer/counter; serial port. These peripheral devices are interrupted by a 8 source and two levels. In order to facilitate programming and verification, the W78E058B allows programming and reading program storage in an electronic manner. Once the code is confirmed, the user can protect the security of the code. The W78E058B microcontroller has two power reduction modes: idle mode and power off mode, both of which are available for software. The idle mode shuts down the processor clock, but allows continuing peripheral operation. The power -off mode stops the crystal oscillator to obtain minimum power consumption. The external clock can stop at any time and any state without affecting the processor.

Features

Y full static design 8 -bit CMOS microcontroller application (Aprom) Y 32K byte system in Y 32K byte system can programming flash EPROM loading program (LDROM) ROMY 512 bytes (including 256 bytes AUX-RAM, software optional) 64K bytes of memory address space and 64K byte data memory address space y four 8-bit two-way ports

A 4-digit Multi -purpose programmable port

Three 16 -bit timer/counter

A full -double -handed serial port

eight sources, two -level interrupt capabilities

function description

The W78E058B architecture consists of a core controller, which is surrounded by four general registers surrounded by special I/O ports. Stringer, serial port. The processor supports 111 different operating codes, and quotes 64K program spaceSite space and 64K data storage space.

Gate

SCRATCHPAD RAM and 256 bytes of AUX-RAM. These RAMs have different addressing methods.

Y RAM 0H-7FH can be directly addressing and indirectly, the same as in 8051. The address pointer is the selected register group R0 and R1.

Y RAM 80H-FFH can only be indirectly addressing as in 8051. The address pointer is the selected register group R0 and R1.

Y Aux-RAM 0H-FFH indirect addressing, using the MOVX instructions as access to external data memory. The address pointer is the selected register group R0 and R1, and the DPTR register. The access to access to the location of the external data memory above FFH will be executed as the MOVX instructions of the 8051. After reset, AUX-RAM was disabled.

Setting level 4 in CHPCON register 4 will enable access to Aux-RaM. When Aux-RAM is to enable the MOVX@Ri " instructions