CPU manager with 32Kbit SPI EEPROM

Function Low VCC detection and resetting assertion-five standard reset threshold voltage-use special programming order to re-program down low VCC reset threshold voltage voltage voltage -The reset signal is valid to VCC 1V battery life is long, low power consumption- lt; 1 Wei'an maximum machine current- lt; 400 Weian maximum reading current 32kbits eeprom built-in accident Write to protect the electricity/power off-power protection circuit-use block lock protection 0, 1/4, 1/2 or all EEPROM array #8482; Protection-programming can only read the memory mode Interface mode (0, 0, 1, 1) minimize EEPROM programming time-32 byte page writing mode-automatic regular-time writing cycle-5 millisecond writing cycle (typical) 5.5 4 and 4.5 volts to 5.5 volt power operations available software packages -14 LD TSSOP, 8 LD SoIC, 8 LD PDIP Leadless+annealing (in line with ROHS)

Explain these devices Three common functions, power -power reset control, power supply voltage monitoring, and block lock protection serial EEPROM memory. This combination reduces system costs, reduces the demand for board space, and improves reliability. Electricity to the device will activate the power -on and reset circuit, so that the reset/reset will maintain the activation state for a period of time. This allows the power and oscillator to stabilize before the processor executes the code. When VCC is lower than the minimum VCC trip point, the low VCC detection circuit of the device is protected from the effects of low -voltage conditions by maintaining reset/reset activation. Reset/reset, keep an assertion until VCC returns to the correct operation level and stable. There are five industry standard VTRIP thresholds available, but the unique circuit of Intersil allows re -programming thresholds to minimize the custom requirements or fine -tune the threshold in applications that require higher accuracy.

Working principle

This circuit activates at about 1V and activates the reset/reset pin. This signal prevents the system microprocessor start working before the voltage is insufficient or the oscillator is stable. When VCC exceeds the device VTRIP value 200 milliseconds (nominal),

Low voltage monitoring during operation, x5328 /x5329 monitor VCC level, if the power supply voltage is lower than the minimum preset, the minimum of the preset VTRIP, then asserts the reset/reset. Subticking/reset signal prevent microprocessor from working in a state of power off or power off. The reset/reset signal remains activated until the voltage drops below 1V. It also remains activated until VCC returns and exceeds VTRIP 200 milliseconds.

Reset/reset, keep the tube foot remain unconnectedConnect. The programming voltage VP is then applied to SCK and Si and the pulse

Figure 1. Set VTRIP voltage

Tighten CS, WP sales and SCK. Reset/reset, keep the feet unconnected. Then the programming voltage vp

Figure 2. Reset vtrip voltage

VTRIP programming sequence flowchart

Direct direct Synchronous serial peripheral interface (SPI) interface with many popular micro -controller families. It contains an 8 -bit instruction register, which can be accessed by SI input. In the entire operation process

Writing and enabled locking device includes writing and enabled locks. This lock must be set before starting the writing operation. The WREN instruction will set the lock, and the WRDI instruction will reset the lock (Figure 3). This lock is automatically reset after the power -powered conditions and the effective writing cycle is completed.

Status register RDSR instruction provides access to status registers. The state register can be read at any time, even in the writing cycle. The format of the status register is as follows:

is writing (WIP) bit is easy to read only, indicating whether the device is busy with internal non -prone writing operation. WIP bit reads the RDSR instruction. When setting to 1 "