Features

Integrated high -voltage start

PFC, half bridge and preheating for 4 drivers

Motter

3.3V microcontroller Compatible

Comprehensively integrate the power management of everyone's power supply

Operation mode

Internal two -point VCC regulator

Over current protection with digital output

Signal

Cross -conducting protection (link)

Impurd pressure lock

Integrated self -lifting diode

Light/irreplaceable ballast

Description

L6382D is suitable for microcontrolly embedded PFC and A's electronic ballast semi -bridge phase. The L6382D includes the 4MOSFET driver stage (PFC, half bridge, for preheating MOSFET) plus power management unit (PMU) also has reference conditions that can provide microcontroller in any case. In addition to improving application efficiency, L6382D also reduces the material list, because different tasks (about driving and power management) are performed by a single IC, which improves the reliability of the application.

Device description

L6382D adopts high -pressure BCD offline technology design. It is a PFC and ballast controller with 4 input pins and a design for design. Provide the maximum flexibility in applications managed by microcontroller. It allows designers to simply change it to use the same ballast circuit for different lamp numbers/type μC software. Digital input pins-can receive signals up to 400kHz-connected to the level converter with control signal to the relevant drive; especially the L6382D embedded system, a driver is used for the PFC pre-regulator stage, and two drives are used for half of the ballet half. The bridge phase (high voltage, also includes guidance function) and the last supplement to supplement the filament preheating function application provided by the dimming isolation winding. It can provide accurate reference voltage (+3.3V ± 1%) μC with a high 30mA: The obtaining the current is due to the high voltage startup generator on the tablet. In addition, the consumption before startup is kept below 150 μA. The chip adopts advanced power management logic design to reduce power consumption and increase application reliability. In the semi -bridge part, the patent integration guidance section replaces the external diode. L6382D also integrates the function of regulating IC power supply (no need to optimize the current consumption.

Electric characteristics

Table 4.. Electrical characteristics (TJ u003d 25 °] C, VCC u003d 13V, CDRIVER u003d 1NF unless there are other regulations)

Table 4. Electrical characteristics (TJ u003d 25 ° C, VCC u003d 13V, CDRIVER u003d 1NF unless there are regulations)

Typical electrical performance

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Application information

Power Management

L6382D has two stable status (preservation mode and operation mode) and the additional status of the two management startup and fault conditions (Figure 10 10 ): Over -current protection is a parallel asynchronous process enabled in the operation mode. The following paragraphs will describe the conditions required for each mode and switching.

Starting mode

Refer to the timing chart of Figure 11, when the current conversion is increased, the voltage on the large capacitor increases, high -voltage power generation The machine can operate about 10mA. This current is reduced by IC consumption (less than 150 μA), and the voltage of the barrier -connected capacitors connected between the pin VCC and the ground is almost linearly increased. At this stage, the functions of all ICs are disabled, except:

The current attenuation circuit on the VREF pin, by keeping the disable microcontroller connected to the pin; The high -voltage startup (HVSU) of conductive) is a capacitor on the external charging pin VCC. When the VCC voltage reaches the starting threshold (14V typical value), the chip starts to work and the high -voltage generator is closed.

Summary:

-The high -voltage startup activation;

-vref is disabled, the additional trap circuit on the pin VREF is enabled;

- TPR is disabled;

-OCP is disabled;

Save mode

This mode enters after the VCC voltage reaches the opening threshold; VREF is enabled in the low -current source mode, and the VREF is enabled in the low -current source mode. To provide the μC connected with it, its required current must be less than 10mA: if the switching activity is not detected at the LGI input terminal, the high -voltage starts the generator circulation switch to maintain the voltage between VCC and VCCSM.

Summary:

-The high -voltage start -generator cycle;

-Vref is enabled at low power current (Iref≤10mA);

--TPR The circuit is disabled;

-OCP is disabled;

- The driver is disabled.

If the VCC voltage is lower than the VREF (level) threshold, the device enters the startup mode.

Work mode

After 10 μs in the preservation mode,And only when the voltage at the VREF is higher than 3.0V at the HGI input terminal, all the functions of the driver and IC have been enabled; this is a mode corresponding to the appropriate light line.

Summary:

-Hvsu closed

-Vref enabled in high power current mode (Iref LT; 30mA)

-TPR circuit enable

-OCP has been enabled

- The driver has been enabled

If there is no switching activity on LGI, the IC returns the preservation mode.

Shut off

This state allows management failure conditions in the operating mode, and one of the following situations:

1.vcc lt; vccoff

2.vref lt; 2.0V (owed pressure failure on VREF)

In this state, the function includes:

-HVSU generator open

[123 ] - VREF enabled in low power current mode (Iref LT; 10MA)

Disable —TPR

-OCP is banned

- Driven

] If the device is in the VCCON state, enter the VCCON state VCC LT; VREF (off), and turn off the μC at the same time. The device will prepare the start -up order.

Meeting

μPUVLO (μPower Under Voltage Lock Out): This Block control power management L6382D to ensure the correct current consumption status of each operation, the correct VREF current capacity, the drive of the drive, and the high -voltage startup generator switch. During the startup process, the device absorbs the current required for charging the external capacitor on the pins VCC of the high -voltage bus; in this state, the function of other ICs is disabled by the current of the entire integrated circuit less than 150 μA. When the voltage on the VCC pin reaches VCCON, the IC enters the preservation mode, where the μPUVLO block starts the generator by turning on/off the high voltage.

HVSU (high -voltage startup generator): 600V internal MOS transistor structure controls the VCC power supply voltage under the condition of starting and saving mode to reduce the power loss in the working mode by turning off the MOS transistor. The source current capacity of this transistor is as high as 30 mAh.

TPR (two -point regulator) and PWS: under normal mode, TPR block control PSThe W switch is used to adjust the IC power supply voltage (VCC) to the range within the range. The PSW transistor Figure 11 is passed between TPR (ON) and TPR (OFF).

--vcc gt; TPRST: psw immediately connected;

–TPR (on) lt; vcc lt; tprst: PSW is opened below

lgi;

--vcc lt; TPR (OFF): Turn off PSW on the lower edge of LGI.

When the PSW switch is disconnected, the diode is established to establish a charge pump structure in order to convert the TPR pin into a switch voltage (through a capacitor) to provide the voltage part of the lower voltage chip without adding any other external components without adding any other external components. Essence The design of the diode and switch can withstand at least 200 mAh.

3.3V reference voltage

This block is used to power the microcontroller; this power supply can provide 10mA mode in Save, which is 30mA in the operating mode; For available, an additional circuit is ensured that even if it sinks 3 mA, the pins voltage will not exceed 1.2V. Before VCC is higher than VREF (closed), it is available for reference; when it is lower than this value, it will turn off, and the additional sink circuit will be enabled again.

LSD (low -voltage side drive): consisting of a MOS driver level from a level converter from 3.3V logic signal (LSI) to VCC; Hui 120mA (minimum value).

HSD (level converter and high -voltage side drive): Enter a signal (HGI) to the high -voltage side door drive from the level of 3.3V logic. Designed for half -bridge high -side power MOS, HSG can produce and absorb 120mA.

PFD (power factor driver): from a 3.3V logic signal (PFI) to VCC MOS driver level: The drive can power from VCC to PFG to 120mA (open) and drop 250mA to GND (off shutdown) (shut down interruption ); MOS suitable for driving PFC pre -level.

HED (thermal drive): The driving level is composed of a level converter from a level from 3.3V logic signal (HEI) to VCC MOS; the driver can power from HEG from VCC to HEG for 30 mAh, and 75 mm will be 75 mm. The filaments suitable for independent power supply are heated.

Self -lifting circuit: The power supply voltage is generated for the high -voltage side drive (HSD). A patent integrated guidance section replaces an external guide diode. This part provides a guidance voltage with a self -lifting capacitor to drive high -power MOSFETs. This function is an external power to the low -voltage side by using the high -voltage DMOS driveMOSFET synchronization driver. In order to start in the safe starting pin and the VCC, even if the ZVS operation may not be guaranteed, it may not be guaranteed.

Internal logic, overcurrent protection (OCP) and link Function DIM (digital input monitor) module managing the input signal sent to the driver to ensure that it is ensured in the place They are at a lower level during the startup process; the lighting block controls the behavior of L6382D in the preservation and operation mode. When the voltage on the pin CSI exceeds 0.5V (typical values) internal reference value, the fault state is locked: In this state, the OCP block forced HSG and LSG signals are low and CSO will be forced to high. This situation will be locked until LSI and HSI are low at the same time, and CSI is lower than 0.5V. This function is suitable for the implementation of over -current protection or hard switching detection by using external sensing resistors. Because the voltage on the pin CSI may become negative, the current must be limited to external components below 2 mAh. Another feature of the DIM block is internal interlocking, which avoids the semi -bridge effect crystal tube: If the input of HGI and LGI happens at the same high level, as long as the HSG duration is short, LSG is in a dangerous state.