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2022-09-21 17:24:28
TXS0102 2 bidirectional voltage level converter is used for drainage and light gap application
The two non -vertical converters use two independent configured power rails. The design purpose of port A is to track VCCA. VCCA accepts any power voltage of 1.65 V to 3.6 V. The B -port design is used to track VCCB.
It must be less than or equal to VCCB. VCCB accepts any power supply voltage of 2.3 V to 5.5 V. This allows low-voltage two-way conversion between 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
When the output enable (OE) input is low, all outputs are in a high impedance state.
In order to ensure a high impedance state during power -on or power -off, OE should pass the drop -down resistor; the minimum value of the resistor is by the driver.
Tube Foot Instructions (DCT and DCU Pack)
Typical working circuit
The working principle of the working principle (Continued)
The architecture of the txs01xx unit
Each A port I/O has one internal 10-kΩ pull-up resistor inside VCCA. Each B port I/O has an internal 10-kΩ upper pull-resistor VCCB resistor. Output a lens to detect the edge of the ascension on port A or B. The time when the PMOS transistor (T1, T2) was started at once at the edge of the rising edge, which accelerated the transformation from low to high.
Autumn time (TFA, the output impedance of T signal depends on the driver
txs0102 . Similarly, the TPHL and MAX data rate depends on the output impedance of the external drive.
The value of T, T typeThe FB, TPHL and maximum data rates in the data table assume that the external drive is less than 50Ω.
In the operation process, ensure that VCCA is always ≤VCCB. Among them, VCCA ≥VCCB does not damage the device, so any power can be started first.
TXS0102 has an OE input to disable the device by setting OE LOW, which put all I/O in Hi-Z in Hi-Z Status. Disable time (TDIS) indicates that the delay from the lower OE to the output is actually disabled (Hi-Z). The enable time (10) indicates that the user must allow the trigger circuit to start working at a time after the operation experience is improved.
Each A port I/O has one inner 10-kΩ upper pull resistor inside the VCCA, and each B port I/O has an internal 10-kΩ upper resistor VCCB resistor. If If you need a smaller pull-up resistance value, you must add an external resistor from the I/O to the VCCA or VCCB (parallel connected with the internal 10-kΩ resistor).
parameter measurement measurementInformation
, Note: A.CL includes probes and fixture capacitors.
Waves 1 for internal conditions to low outputs, unless the output control is disabled.
Waveform 2 is used for internal conditions to make the output high, unless the output control is banned.
All input pulses are provided by generators with the following characteristics: PRR 10 MHz, ZO 50Ω, DV/DT≥1 V/NS.
, measure an output each time, and measure a conversion at a time.
, TPLZ and TPHZ are the same as TDIS.
, TPZL and TPZH are the same as ten.
, TPLH and TPHL are the same as TPD.
, VCCI is a VCC associated with the input port.
, VCCO is a VCC associated with the output port.
All parameters and waveforms are not suitable for all equipment.
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