Features

current output range: 0mAh to 20 mAh, 0 mAh to 24 mAh or 4 mAh to 20 mAh; ± 0.03%FSR typical total unsettled error (TUE) ; ± 5ppm/℃ typical output drift; 2%overvoed range; voltage output range: 0 V to 5 V, 0 V to 10 V, 0 V to 40 V; 3PPM/℃ typical output drift; over -range capacity of all range; flexible serial digital interface; output failure detection on the film; PEC error check; asynchronous clearance function; power supply range; average voltage: 12 volts (± 10%) to 55 volts (Maximum value); Output circuit conforms to AVDD-2.75 V; temperature range: -40 ° C to+105 ° C; 32 Drawing 5mm × 5mm LFCSP packaging.

Application

process control; actuator control; programmable logic controller.

General description

AD5751 is a single channel, low cost, high precision, voltage/current output drive, with a hardware or software programmable output range. Software range configuration #8482; -The compatible serial interface through SPI-/Microwire. The goal of AD5751 is the application in programmable logic controllers and industrial process control. The analog input of AD5751 is provided by a low -voltage single power sources (DAC) and internal adjustment to provide the required output current/voltage range.

The range of output current can be programmed within three current range: 0mAh to 20 mAh, 0 mAh to 24 mAh or 4 mAh to 20 mAh.

The voltage output is provided by a separate pin, which can be configured to provide the output range of 0 V to 5 V, 0 V to 10 V and 0 V to 40 V. There is an excess range of voltage range.

The simulation output has short circuit and opening protection, which can drive 1 μF capacitance load and 0.1 H inductor load.

The device stipulates that it runs within the power range of 10.8 V to 55 V. The output loop is 0 V to AV 2.75 V.

The flexible serial interface is compatible with SPI and microfilm, which can minimize the number isolation required for isolation applications in the three -line mode. The interface also has an optional PEC error check function using CRC-8 error check, which is very useful in the industrial environment where data communication damage may occur.

This device also includes the power -on reset function to ensure that the device is powered on under the known state (0V or three state), and the asynchronous clearance pin. Output or low -end of the selected current range.

Hardware selection pins are used to configure components for hardware or software mode when power -poweredEssence

Figure Figure

[ 123] Absolute maximum rated value

The stress higher than the absolute maximum rated value may cause permanent damage to the device. This is just a stress rated value; the functional operations of the equipment in the operation chapter of this specification or above or any other conditions do not mean. Long -term exposure to absolute maximum rated conditions may affect the reliability of the device.

[123 ] Term The total error of the unsettled (tue)

Tue is a method of measurement and output error. Error: Error input error, offset error, gain error, output drift, temperature and time. TUE represents a percentage (FSR) of the full marking range (FSR).

Relative accuracy or integral non -linearity (INL) INL is the maximum deviation (unit of%FSR) that transmits the end point of the function end point through the output driver. The typical input voltage and input voltage curve are shown in Figure 5.

Full marking error

Full marking error is the deviation of the actual full -scale simulation output and the ideal full marking output. Full margin error is expressed as percentage (FSR) of the full marking range (FSR).

Full marking TC

Full marking TC is a method of measuring full marking error with temperature changes. It is represented by PPM FSR/℃.

gain error

gain error is a method of measuring output span error. It is the slope deviation of the output transmission characteristics and the ideal value, which is represented by%FSR. The relationship between the gain error and the temperature is shown in Figure 10.

gain error TC

gain error TC is a method for measuring gain errors with temperature changes. The gain error TC is represented by PPM FSR/℃.

Zero -scale error

Zero -standard error is the deviation of the actual zero -standard simulation output and the ideal zero -standard output. The zero -scale error is represented by the millival (MV).

Zero -standard TC

Zero -standard TC is a method that measures zero -standard error with temperature changes. Zero -standard error is represented by PPM FSR/℃.

The offset error

The offset error is the measurement between the difference between the actual VOUT and the ideal VOUT represented by the millival (MV) in the linear area of the function. It can be negative or positive.

Output voltage stability time

The output voltage stability time is the time required to stabilize to the specified level under the transformation of the semi -standard input change.

Rotary rate

The conversion rate of a device is a limit to the change rate of the output voltage. The output rotation speed is usually limited by the turning rate of the amplifier used in its output. The conversion rate is measured from 10%of the output signal to 90%, and is represented by V/μs.

current ring voltage compliance

The current ring voltage conformity is the maximum voltage of the output pins of the output value equal to the programming value.

Purchase fault energy

Power -power failure energy is an analog output pulse in an AD5751. It is specified as a faulty area in units of NV SEC.

Power suppression ratio

PSRR indicates how the change of the power supply voltage affects the output.

Operation theory

AD5751 is a single channel, low cost, high accuracy, voltage/current output drive, with a hardware or software programmable output range. The software range is configured by serial interface compatible with SPI-/Microwire. Scope of hardware range pins (R0 to R3) programming. The analog input of AD5751 is provided by the low -voltage single power supply DAC (0 V to 4.096 V). The DAC internal adjustment is provided to provide the required output current/voltage range.

The range of output current can be programmed within three range: 0 mAh to 20 mAh, 0 mAh to 24 mAh or 4mAh to 20 mAh. The voltage output is provided by a separate pin, which can be configured to provide the output range of 0 V to 5 V, 0 V to 10 V, and 0 V to 40 V. Within the output voltage range of 5 V and 10 V, 20%of the ultra -volume is available. Within 0 V to 40 V, 10%of the ultra -volume is available. Output pins and output pins can be connected together. In the current range of 0mAh to 20 mAh, 0mAh to 24mAh, and 4mAh to 20 mAh, 2%of the 2%transcendence is available. The current and voltage output can be used on a separate pin. Only one output can be enabled at a time. Select the output range by programming R3 to R0 in control (see Table 7 and Table 8).

Figure 50 and Figure 51 show the typical configuration of AD5751 in the output module system under the software mode and hardware mode, respectively. The HW Select Pin optional part is configured in software mode or hardware mode. AD5751's analog input is DAC (such as AD506X or AD566X) Provide, the DAC can provide an output range of 0 V to 4.096 V. DAC's power and reference, and the reference of AD5751 can be provided by ADR392. AD5751 can work under a single power supply of up to 55 V.

Software mode

In the current mode, the output range of software -available software includes 0 mAh to 20 mAh, 0 mAh to 24 mAh or 4mAh to 20 mAh. In the voltage mode, the output range of software can be selected includes 0 V to 5 V, 0 V to 10 V, 0 V to 40 V.

voltage output amplifier

The voltage output amplifier can drive 1 kΩ load (suitable for the range of 0 V to 5 V and 0 V to 10 V) and 5 kΩ (suitable for 0 V to 40 40 The load in the V range, and the capacitance load below 2 μF (COMP1 and COMP2 pins have external compensation capacitors). The source and exchange capacity of the output amplifier is shown in Figure 15. The conversion rate is 2V/microsecond.

Inside the device, there is a 2.5 MΩ resistor connected between Vout and VSENSE+. If a failure occurs, these resistors can protect AD5751 by ensuring the closure of the amplifier loop to prevent the parts from entering the ring.

The current and voltage are output on a separate pipe foot, and cannot be output at the same time. This allows users to connect the current and voltage output pin and configure the terminal system to a single channel output.

Drive large capacitor load

The voltage output amplifier can drive up to 1 μF capacitor load by adding non -polar compensation capacitors between COMP1 and COMP2. If there is no compensation capacitor, it can drive up to 20 NF capacitance loads. Pay attention to select the appropriate value for the CCMP capacitor. This electricityThe container allows AD5751 to drive higher capacitance loads and reduces super adjustment. At the same time, it increases the adjustment time of components, which affects the system bandwidth. The consideration value of the capacitor should be within the range of 0 nf to 4 nf, depending on the balance required between stable time, over -adjustment and bandwidth.

AD5751's power -power state

When power is powered, the AD5751 detection has loaded the hardware or software mode and sets up power -on conditions accordingly. In the software SPI mode, the power -on state of the output depends on the status of removing the tube. If the pin is cleared, this part of the power is driven to drive a positive 0 volt output. If the pin is removed, this part of the power supply and voltage output channel are in the three state mode. In these two cases, the current output channel is powered on (0 mAh) under triple conditions. If necessary, this allows voltage and current output to be connected together.

To make the components work normally, the user must set the OUTEN bit in the control register to enable the output and set the output range configuration with the R3 to R0 range in the same writing. If the pin is still in a high (activated) state during the writing process, the part will be automatically cleared to its normal removal state. This state is defined by the programming range and the clrsel pin or the clrsel position (for details, please refer to the asynchronous clearing (Clear) Part). When operating parts under normal mode, the sales must be removed.

Clear pins are usually driven directly from the microcontroller. With the power supply of the AD5751 power supply independent of the microcontroller power, users can connect the weakly pull -up resistor to the DVCC or connect the drop -down resistor to the ground to ensure that the correct power -powered conditions independent of the microcontroller are independently controlled. The 10 kΩ up/drop -down resistor on the transparent pins should be enough to meet most applications.

If the hardware mode is selected, the conditions of the component to the R3 to R0 range definition and the status of the OUTEN or CLEAR pin. It is recommended to keep the output disable when the component is powered on in the hardware mode.

The default register when booting

AD5751 The power -to -reset circuit ensures that all registers are loaded with zero code.

In the software SPI mode, parts are powered on, and all outputs are disabled (Outn bit 0). The user must set the OUTEN bit in the control register to enable the output, and use the R3 to R0 bits to set the output range configuration in the same time. If the hardware mode is selected, the conditions of the component to the definition of the R3 to R0 and the status of the OUTEN pin. It is recommended to keep the output disable when the component is powered on in the hardware mode.

reset function

In the software mode, you can use a reset pin (effective low) or resetting (reset 1) reset parts. Reset the disabled current and voltage output to its power -powered state. The user must write the OUTEN bit to enable the output, and write together, setOutput range configuration. The reset pin is a level sensitive input; as long as the reset pin is low, the component is maintained in the reset mode. After the reset command of the register is controlled, the reset bit is cleared to 0.

In the hardware mode, there was no reset. If parts are used in the hardware mode, the reset should be tightly sold.

Orton

In the software mode, you can use the OUTEN bit in the control register to enable or disable the output. When the output is disabled, the current and voltage channels enter the three state. The user must set the OUTEN bit to enable the output and set the output range configuration at the same time.

In the hardware mode, you can use the OUTEN tube to enable or disable output. When the output is disabled, the current and voltage channels enter the three state. Users must write Outen Pin to enable the output. It is recommended to disable the output when changing the range.

Software control

By connecting the hardware pins to ground, the software control is enabled. In the software mode, AD5751 is controlled by a multi -functional 3 -line serial interface, which works at a clock frequency of up to 50MHz. It is compatible with SPI, QSPI compatibility #8482;, micro -line and digital signal processor standards.

Input displacement register

The input shift register is 16 bits wide. Under the control of SCLK in the serial clock, the data is first loaded into the device MSB as 16 -bit characters. Data records on the decline of SCLK.

The input displacement register consists of 16 control bits, as shown in Table 7. The timing diagram of this writing operation is shown in Figure 2. The top three of the input displacement register is used to set the hardware address of the AD5751 device on the printing circuit board (PCB). Each board can address up to 8 devices.

In any writing sequence, bit D11, bit D1, and position D0 must always be set to 0.

Activate the correct device address to activate the recovery mode (A2, a1, A0) Then set the R/W bit to 1. By default, the SDO tube foot is disabled. After reading the AD5751 reading operation and addressing, set the R/W to 1 to enable the SDO tube foot, and the SDO data will be timed along the 5 rising SCLK. After the data on the SDO is punch -in, the synchronous ascending edge is disabled (three -state) SDO tube feet again. During the same reading cycle, status register data (see Table 9) and control register data are available.

The status level includes four readers. They are used to notify users specific faults, such as output opening or short circuit, overheating errors or interface errors. If any failure occurs, the hardware failure is also asserted to be low, which can be used as a hardware interrupt of the controller.