BYJ32027A_IRF7907TRPBF Introduction

A few days ago, Vishay Intertechnology, Inc. announced that it has expanded its TNPU e3 series of automotive-grade high-precision thin-film flat chip resistors with new devices with a temperature coefficient (TCR) as low as 2 ppm/K, in 0603, 0805 and 1206 form factors.

Today I will introduce to you a domestic FET that is suitable for lithium battery protection boards and can replace MOS tubes such as AO3401: NCE3401.

BYJ32027A_IRF7907TRPBF

BYC6212

However, in terms of structure, there is a big difference between them. In order to better understand the mechanism of power MOSFET, we must first recall the mechanism of low-power FET. . The following describes the principle of the MOS transistor with the structure of an N-channel enhancement type low-power MOSFET. Working principle of power MOS tube Power MOS tube is developed from low-power MOS tube.

NCE3019AS NCE3045G NCE3400AY NCE30ND07S NCE8601B.

BYS3105 BYP3105 BYJ31020A BYH31012A BYJ31012A BYP3104 BYF31010A BYP31013A BYS31010A BYH31055 .

MOS tube 3306 product features 1. RDS(on)=7mΩ@VGS=10V 2. Lead-free green equipment 3. Low resistance switch to reduce conduction loss 4. High avalanche current.

BYJ32027A_IRF7907TRPBF

AM9945N-T1-PF

The structure of the MOSFET shown in the figure is not suitable for use in high-power applications for two reasons. On the one hand, the three electrodes of the low-power MOSFET are on one plane, the channel cannot be made very short, and the channel resistance is large. On the other hand, the conductive channel is composed of surface induced charges, and the channel current is the surface current. To increase the current capacity, it is necessary to increase the chip area. Such a structure is unlikely to achieve a large current. .

The N-channel enhancement mode MOS transistor uses a low-doped P-type semiconductor as the substrate, and forms two heavily doped N+ regions on the substrate by a dispersed method, and then generates a very thin one on the P-type semiconductor. A silicon dioxide insulating layer, and then photolithography is used to etch away the silicon dioxide layer on the upper end of the two heavily doped N+ regions, exposing the N+ regions, and finally on the outer surface of the two N+ regions and the two between them. The surface of silicon oxide is sprayed with a layer of metal film by evaporation or sputtering. These three metal films constitute the three electrodes of the MOS tube, which are called source (S), gate (G) and drain (D) respectively. .

. The characteristics of a MOSFET can be characterized by a transfer characteristic curve and a drain output characteristic curve. Figure 3 shows the handling characteristics of a certain FET. The transfer characteristic refers to the relationship curve between the gate voltage UGS and the corresponding drain current ID when the voltage UDS between the drain and the source is at a certain fixed value.

NCE3020K NCE3025Q NCE3035K NCE3025G NCE3030K.

BYJ32027A_IRF7907TRPBF

NCE2302D NCE2302F NCE1012E NCE2302B NCE2302.

NCE8205B NCE8205 NCE8205i NCE8205E NCE9926.

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