Performance characteristics

12.5 NS instruction cycle time@1.8 v (internal), 80 mIPS continuously perform; single cycle instruction execution; single cycle context switch; 3 bus architecture allows dual operations to obtain; each one; each one; The instruction cycle; multi-functional instruction; low CMOS standby power-off mode; 200 recovery power consumption; from the state of power-off; the success of the low power consumption in the free mode; ADSP-2100 series code compatibility compatible (Easy to use algebraic grammar), with instruction set expansion; RAM on the tablet with up to 256K bytes, configuration to; 48k -character program memory RAM; data memory RAM with up to 56K words; for instructions and data storage; independent ALU, multiplication method method Overse/Cumulator and Barrel; Calculating Unit of the displacement; two independent data address generators; powerful program sequencers provide zero overhead; cycle conditions instruction execution; Lead LQFP and 144 fans BGA.

System interface characteristics

Flexible I/O allows 1.8 V, 2.5 V or 3.3 V operation; regardless of the mode, all inputs can withstand up to 3.6 V voltage; 16 -bit internal DMA Port, for high -speed access to the film (optional mode); the 4M byte memory interface and program coverage of the data table (optional); for transparent program and data memory transmission (optional); Pass and independent I/O; memory space allows glueless " system design; programming can be generated; two dual -buffer serial ports with pressure expansion; hardware and automatic data buffer; automatic guidance of the program memory on the film; byte by bytes; bytes; bytes Wide external memory