Low-cost multi-chemical battery charge and discharge control ISL6251 , ISL6251A are highly integrated battery Li-Ion/Li-Ion polymer battery charger controllers for NiMH batteries. High efficiency is achieved through the use of synchronous buck topology and MOSFETs, instead of diodes, for slave adapters or batteries. Low-side MOSFETs mimic light-emitting diodes to improve light-load efficiency and prevent bus boosting of system loads. Constant output voltage is selectable for 2, 3 and 4 series Li-Ion batteries with 0.5% over temperature accuracy. It also works at 4.2V+5%/battery and 4.2V-5%/battery, optimizing battery capacity. When supplying the load and battery charger simultaneously, the input AC adapter current limit is programmable to 3% accuracy to avoid overloading the AC adapter, as well as allowing the system to efficiently use the available adapter charging power. It also has a wide range of programmable charge currents. The ISL6251 and ISL6251A provide an output for monitoring current consumption from an AC adapter, and monitoring the presence of an AC adapter. ISL6251, ISL6251A automatically convert from regulated current mode to regulated voltage mode.

notes:

1. Intersil lead-free + annealed products use a special lead-free material set; molding compound/mold connection material and 100% matte tinplate finish, RoHS compliant and compatible with SnPb and lead-free soldering operations. The MSL of Intersil's lead-free products is classified as meeting or exceeding the lead-free requirements of IPC/JEDEC J STD-020.

2. Add "-T" for tapes and reels.

feature

Charge Voltage Accuracy ±0.5% (-10°C to 100°C) ±3% of Accurate Input Current Limit

The battery charge current is accurately limited to ±5%

Accurate to ±25% of battery trickle charge current limit (ISL6251A)

Programmable charge current limit, adapter current limit and charge voltage

Diode Emulation at Light Load for Fixed 300kHz PWM Synchronous Buck Controller

Output current from AC adapter

AC adapter display indicator

Fast input current limit response

Input Voltage Range 7V to 25V

Supports 2, 3 and 4 battery packs

Up to 17.64V battery voltage setting

Thermal shutdown

Support pulse charging

Battery leakage current is less than 10 microamps

Charges any battery chemistry: Li-Ion, NiCd, NiMH, etc.

Lead-free plus annealed (RoHS compliant) available

application

Notebooks, desktops and sub-notebooks

personal digital assistant

Absolute Maximum Ratings Thermal Information

DCIN, CSIP, CSON to GND. -0.3V to +28V

CSIP-CSIN, CSOP-CSON. -0.3V to +0.3V relative to ground. -7V to 30V

lead to ground. -0.3V to +35V

Startup phase, VDD-GND, VDDP-PGND,

ACPRN to GND. -0.3V to 7V

ACSET to GND (Note 3). -0.3V to VDD+0.3V

ICM, ICOMP, VCOMP to GND. -0.3V to VDD+0.3V

ACLIM, CHLIM, VREF, cell ground. -0.3V to VDD+0.3V

EN, VADJ, PGND to GND. -0.3V to VDD+0.3V

wear. Phase -0.3V to Start +0.3V

LGATE. PGND-0.3V to VDDP+0.3V

Thermal resistance θJA (°C/W) θJC (°C/W)

QFN package (Note 4, 6). 39 9.5

QSOP package (Note 5). 88 Not applicable

Electrostatic discharge classification. secondary

junction temperature range. -10°C to +150°C

range of working temperature. -10°C to +100°C

Storage temperature. -65°C to +150°C

Lead temperature (soldering, 10s). +300 degrees Celsius

CAUTION: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a pressure rating and operation

Installation under the above or any other conditions stated in the operating section of this specification is not implied.

notes:

3. When the voltage through ACSET is lower than 0V, the current through ACSET should be limited to less than 1mA.

4. θJA is measured in free air with the part mounted on a high-efficiency thermal conductivity test board with "direct connect" characteristics. See Technical Brief TB379.

5. θJA is measured with components mounted on a high-efficiency thermal conductivity test board in free air. See Technical Bulletin TB379 for details.

6. For θJC, the "case temperature" location is the center of the exposed metal pad on the bottom of the package.

Electrical Specifications DCIN=CSIP=CSIN=18V, CSOP=CSON=12V, ACSET=1.5V, ACLIM=VREF, VADJ=Floating, EN=VDD=5V, Startup Phase=5.0V, Ground=PGND=0V, CVDD=1μF , IVDD=0mA, TA=-10°C to +100°C, TJ≤125°C, unless otherwise specified.

Electrical Specifications DCIN=CSIP=CSIN=18V, CSOP=CSON=12V, ACSET=1.5V, ACLIM=VREF, VADJ=Floating, EN=VDD=5V, Startup Phase=5.0V, Ground=PGND=0V, CVDD=1μF , IVDD=0mA, TA=-10°C to +100°C, TJ≤125°C, unless otherwise specified. (continued)

Note:

7. This is the sum of the currents in these pins (CSIP, CSIN, BOOT, UGATE, PHASE, CSOP, CSON), all tied to 16.8V. No current in pins EN, ACSET, VADJ, CELL, ACLIM, CHLIM.

Typical operating performance DCIN=20V, 4S2P lithium battery, TA=25°C, unless otherwise specified.

Typical operating performance DCIN=20V, 4S2P lithium battery, TA=25°C, unless otherwise specified. (continued)

Function pin description

Connect the sheath to the phase pin of the 0.1µF ceramic capacitor and to the cathode of the bootstrap Schottky diode.

UGATE is the high-side MOSFET gate drive output.

LGATE is the low-side MOSFET gate drive output; swing is between 0V and VDDP.

phase

The phase connection pins connect to the high-side MOSFET source, output inductor, and low-side MOSFET drain.

CSOP/CSON are battery charge current sense positive/negative inputs. The differential voltage CSON through CSOP is used to sense the battery charging current and compare it with the charging current limit threshold to regulate the charging current. The CSON pin is also used as the battery feedback voltage to perform voltage regulation. CSI/CSI CSIP/CSIN are AC adapter current sense positive/negative inputs. The differential voltage CSIN across the CSIP is used to sense the AC adapter current and compare the AC adapter current to the AC adapter current limit.

GND is the analog ground.

The DCIN pin is the input to the internal 5V LDO. Connect it to the AC adapter output. Connect DCIN to a 0.1µF ceramic capacitor. A/C unit ACSET is an AC adapter detection input. Resistor divider connected to adapter input.

ACPRN is an AC adapter with an open-drain output. ACPRN is active low at 1.26V when ACSET is above normal and high at 1.26V when ACSET is below normal.

EN is the charge enable input. Connect EN to high to enable the charge control function and connect EN to low to disable the charge function. Used with a thermistor to detect a hot battery and suspend charging.

Information management

ICM is the adapter current output. The output of this pin produces a voltage proportional to the adapter current. PGND is the power ground. Connect PGND to the low-side MOSFET for the low-side MOSFET gate driver.

video display

VDD is an internal LDO output used to provide IC analog circuitry. Connect a 1µF ceramic capacitor to ground.

virtual data processing

VDDP is the supply voltage for the gate of the low voltage MOSFET. Connect a 4.7Ω resistor to VDD and a 1µF ceramic capacitor to ground.

ICOMP is the output of the current loop error amplifier.

VCOMP is a voltage loop amplifier output.

This pin is used to select the battery voltage. Cell = VDD for 4S battery pack, battery = ground for 3S battery pack, battery = float for 2S battery pack.

VADJ regulates the battery regulation voltage. VADJ=VREF for 4.2V+5%/cell; VADJ=floating 4.2V/cell; VADJ=ground 4.2V-5%/cell. Connect to a resistor divider to program the desired battery voltage between 4.2V-5% and 4.2V+5%.

CHLIM is the battery charge current limit setting pin. The Kling input voltage range is 0.1V to 3.6V. When CHLIM=3.3V, the set value of CSOP-CSON is 165mV. Charger Shutdown If CHLIM is forced below 88mV, it will shut down.

ACLIM is the adapter current limit setting pin. ACLIM=VREF for 100mV, ACLIM=float 75mV, ACLIM=ground 50mV. Connect a resistive divider to program the adapter with a current limit threshold between 50-100 mV.

VREF is a 2.39V reference output pin. It compensates internally. Do not connect decoupling capacitors.

theory of operation

introduce

The ISL6251, ISL6251A includes all the functions necessary to charge 2-4 battery Li-Ion and Li-Polymer batteries. A high-efficiency synchronous buck converter is used to control the charging voltage and charging current up to 10A. ISL6251, ISL6251A have input current limit and analog input voltage for setting charging current and charging; CHLIM input is used to control charging current and VADJ input is used to control charging voltage. ISL6251, ISL6251A maintain a constant charging current when charging the battery, set by the CHLIM input, until the battery voltage rises to the program charging voltage set by the VADJ input; then the charger starts to work in constant voltage charging mode.

The EN input allows commands from the microcontroller. It also uses EN to safely shut down the charger when the battery is extremely hot. Adapter current flow is reported on the ICM output. Figure 11 shows the IC functional block diagram. The synchronous buck converter uses an external N-channel to convert the input voltage to the mosfet charging current and charging voltage of the desired voltage. Figure 12 shows a typical application circuit of the ISL6251, ISL6251A with charging current and charging voltage fixed at specific values. This typical application circuit shown in Figure 13 shows the ISL6251, ISL6251A using a microcontroller to adjust the charge current input set by CHLIM. The voltage at CHLIM and the value of R1 set the charge current. The DC/DC converter generates control signals that drive two external N-channel MOSFETs conditioned by ACLIM, CHLIM, VADJ and the unit inputs. The ISL6251 and ISL6251A have a voltage regulation loop (VCOMP) and two current regulation loops (ICOMP). This VCOMP voltage regulation loop monitors CSON to ensure its voltage never exceeds this voltage and regulates the battery charge voltage set by VADJ. The ICOMP current regulation loop regulates the battery charging current to the battery to ensure that it does not exceed the charging current limit set by CHLIM; and the ICOMP current regulation loop also regulates the slave AC adapter to ensure that it never exceeds the input current limit set by ACLIM, And protect against system crashes and overloaded AC adapters.

PWM control

ISL6251, ISL6251A adopt the current mode control structure function of fixed frequency pulse width modulation with feedforward. The feedforward function maintains a constant modulator gain of 11 to achieve step-down input voltage changes. When the battery is charged with a voltage close to the input voltage, the DC/DC converter operates in an exit mode with a timer to prevent the frequency range from dropping down to audible frequencies. Its duty cycle can reach 99.6%. To prevent the system bus voltage from rising, the battery charger operates in standard buck mode when CSOP CSON falls below 4.25 mV. Once in standard buck mode, the hysteresis does not allow the DC/DC converter until CSOP-CSON rises above 12.5mV. An adaptive gate drive scheme is used to control the dead time between the two switches. The dead-time control circuit monitors the LGATE output and blocks the upper side from the MOSFET until the LGATE is fully turned off, preventing cross-conduction and shooting. In order for the dead time circuit to work properly, there must be a low resistance, low inductance path from the LGATE driver to the MOSFET from the MOSFET source to PGND. This external Schottky diode is located between the VDDP pin and the boot pin to keep the boot capacitor charged. Setting the Battery Regulation Voltage The ISL6251ISL6251A uses high precision trim to regulate the bandgap reference voltage for battery charging. The VADJ input adjusts the output voltage of the charger, and the VADJ control voltage can be from 0 to VREF, providing a 10% adjustment range (from 4.2V-5% to the CSON adjustment voltage of 4.2V+5%. The total voltage accuracy is more than 0.5%.

The terminal voltage of each cell is the cell chemistry. Consult the battery manufacturer to determine this voltage. Float VADJ, set battery voltage VCSON = 4.2V x number of cells, connect VADJ to VREF, set 4.41V x number of batteries, connect VADJ to ground, set 3.99V x number of cells. Therefore, the maximum battery voltage can reach 17.6V. Note that other battery charging voltages can be used by connecting a resistor divider from VREF to ground. The size of this resistor divider should be no more than 100µA from VREF; or connect to a low impedance voltage source such as a D/A converter in a microcontroller. The programmed cell voltage for each cell can be determined by the following equation:

Connect the batteries to Charge 2, 3 or 4 Li+, cells as shown in Table 1. When charging other battery chemistries, use the battery to select the output voltage range of the charger. Internal error amplifier gm1 maintains voltage regulation. The voltage error amplifier is compensated on VCOMP. Components The values shown in Figure 12 are for most applications. Individual compensation regulation of voltage and current regulation loops allow optimum compensation.

Set the battery charge current limit The CHLIM input sets the maximum charge current. This current sense resistor sets the currents CSOP and CSON. The full-scale differential voltage is 165mV for CSOP and CSON when CHLIM=3.3V, so the maximum charge current induced by a 40mΩ resistor is 4.125A. Other battery charge current detection thresholds can be set by connecting a resistor divider to VREF or 3.3V to ground, or by connecting a voltage source such as a D/A converter in a low impedance microcontroller. The charge current limit threshold is given by:

To set the trickle charge current for the dumb charger, a resistor in series with switch Q3 (Figure 12) is used by the microcontroller to ground from the CHLIM pin. The trickle charge current is given by

The battery charger is disabled when the CHLIM voltage is below 88mV (typ). When selecting a current sense resistor, be aware that a sense resistor will cause further power dissipation and reduce efficiency. However, adjusting the CHLIM voltage to lower the voltage across the current sense resistor R1 will reduce the accuracy of the sense amplifier due to the smaller current input signal. in accuracy and power consumption. A low-pass filter is recommended to remove switching noise. Connect the resistor to the CSOP pin instead of the CSON pin because the CSOP pin has a lower bias current effect on current sense accuracy as well as voltage regulation accuracy.

Set input current limit

The total input current supply from the AC adapter or other DC is the system supply current and the battery charging current. The input current regulator limits when the input current exceeds the input current limit setting. System currents are often powered up or down as part of the system fluctuations. Without input current regulation, the source must be able to supply both the maximum system current and the maximum charger input current simultaneously. The performance of the current AC adapter can reduce system cost by using an input current limiter. The ISL6251, ISL6251A limit battery charging current to ensure that the battery charger does not drop the voltage of the AC adapter load when the input current limit threshold is exceeded. This constant input current regulation allows full powering of the system and prevents AC adapter adapter overload and system bus crashes. Internal amplifier gm3 compares CSIP and CSIN to the input current limit threshold voltage set by ACLIM. Connect ACLIM to REF, Float, and GND with a full-scale input current-limit threshold voltage of 100mV, 75mV and 50mV, respectively, or use VREF to ground, and set the input current limit as follows:

When choosing a current sense resistor, be aware that the voltage drop across the resistor will create more power dissipation, reducing efficiency. AC adapter current sensing accuracy is very important. Use a 1% tolerance current sense resistor. The highest accuracy is ±3% with 100mV current sense threshold voltage to achieve ACLIM=VREF, but it consumes the highest power. For example, a power draw of 400 mW rated at 4A AC might have to use an adapter and a 1W sense resistor. ? 4% 75mV and 50mV can achieve ±6% accuracy ACLIM = float and ACLIM are GND respectively. A low-pass filter is recommended to remove switching noise. Connect the resistor to the CSIN pin instead of the CSIP pin because the bias current of the CSIN pin is small and has little effect on the sensory accuracy of the current. AC Adapter Detection Connects the AC adapter voltage to ACSET through a resistive divider and is used to detect when AC power is available, as shown in Figure 12. ACPRN is an open-drain output that falls when ACSET is above the vertical height. Vth, rise and Vth, fall are given by:

where Ihys is the ACSET input bias current hysteresis and vacuum settings = 1.24 volts (min), 1.26 volts (typ) and 1.28 volts (max). This hysteresis is IhysR8, where Ihys = 2.2µA (min), 3.4µA (typ) and 4.4µA (max).

Current measurement

Use the ICM to monitor the sensed input current CSI team and CSI team. The output voltage range from 0 to 2.5VICM with CSIP and CSIN is given by the following equation:

where IINPUT is the DC current drawn from the AC adapter. The accuracy of the ICM is ±3%. A low-pass filter connected to the ICM output is used to filter switching noise. The linear regulator VDD provides a 5.075V supply from an internal LDO. The voltage regulator comes from DCIN and can output up to 30mA. The MOSFET driver is powered by VDDP, which must be connected to VDDP as shown in Figure 12. The VDDP connection is connected to VDD through an external resistor. Bypass VDDP and VDD with 1µF capacitors. Shut down ISL6251, ISL6251A has a low-power shutdown function mode. Driving at low speeds will turn off the charger. When off, the DC/DC converter is disabled and VCOMP and ICOMP are pulled to ground. ICM, ACPRN output continue function. EN can be driven by a thermistor for automatic shutdown when the battery pack is hot. Usually the thermistor is built into the NTC battery pack to measure temperature. When connected to the charger, the thermistor forms a voltage divider and the resistor is pulled up to VREF. The threshold voltage of EN is 1.06V with a hysteresis of 60mV. The resistance of the thermistor can be selected to suddenly decrease to a temperature characteristic above the critical temperature. This arrangement automatically shuts down the charger when the battery pack rises above a critical temperature. Another way to suppress charging is to force CHLIM below 88mV (typ). Short circuit protection and 0V battery charging because the battery charger will regulate the charging current to the limit set by CHLIM, automatic short circuit protection and can provide charging current to wake up a depleted battery

Over temperature protection

If the mold temperature exceeds 150°C, stop charging. Once the mold temperature drops below 125°C, charging will start again. Application Information The following battery charger design refers to the application circuit in Figure 12, where a typical battery is in a 4S2P configuration. This section describes how to select external components, including inductors, input and output capacitors, switching mosfets, and current-sense resistors. Inductor Selection Inductor selection is based on cost, size and efficiency. For example, the lower the inductance, the smaller the size, but the higher the ripple current. This also results in reduced system efficiency when AC losses in the core and winding are high. On the other hand, higher inductance results in lower ripple current and smaller output filter capacitance, but has higher DCR (DC inductor resistance) losses and slower transient response. Therefore, the actual inductor design is based on the inductor ripple current being ±(15-20)% of the maximum DC current operating at the maximum input voltage. This required inductance can be calculated by the following formula:

Loop Compensation Design

The ISL6251 uses a constant frequency current mode control architecture to achieve fast loop transient response. An accurate current-sense resistor-inductor in series with the output is used to regulate the charging current, and the sensed current signal is injected into the voltage loop for current-mode control simplifying loop compensation design. The inductor is not considered a state variable for current mode control and the system becomes a single order system. Design a compensator control that stabilizes the voltage loop than the voltage mode. Figure 14 shows a synchronous buck regulator. Pulse Width Modulation Comparator Gain FM: PWM Comparator Gain Fm Control for Peak Current Mode is provided by:

component placement

The power MOSFET should be placed close to the IC so that the gate drive signals, LGATE, UGATE, PHASE, and BOOT, may have short traces. Placing components on ICs with high dv/dt and di/dt has fewer noise traces, such as gate signals and phase node signals. Signal ground and power ground connections. At least a sizable area of copper should be shielded through the IC from other noise couplers as signal grounds under the IC. The best connection points for signal ground and power ground are on the negative side of the output capacitor on each side of the noise; noise traces under the IC are not recommended.

GND and VDD pins

At least one high-quality ceramic decoupling cap is used to pass through these two pins. The decoupling cap can be placed close to the IC.

LGATE pin

This is the gate drive signal for the bottom MOSFET of the buck converter. Signals going through this trace have high dv/dt and high di/dt, as well as high peak charge and discharge currents. The two traces should be short, wide, and away from the other traces. There should be no other traces parallel to these traces on any layer.

PGND pin

The PGND pins should be routed on the associated output caps with separate traces. The negative side output capacitor must be close to the bottom MOSFET. This trace is the return path for LGATE.

Phase pin

This trace should be short and far away from other traces with weak signal traces. This node has a very high dv/dt voltage swing from input voltage to ground. No trace should be parallel to it. This trace is also the return path for Ugate. Connect this pin to the high side MOSFET source.

This pin has a square waveform with high dv/dt. It provides gate drive current to charge and discharge top MOSFETs with high di/dt. This trace should be wide, short, and away from other traces that resemble amalgam.

guide pin

The di/dt of this pin is as high as the molar; therefore, this trace should be as short as possible. CSOP, CSON pin current sense resistor connected to CSON and CSOP pin through low pass filter. The CSON pin is also used for battery voltage feedback. Traces should be away from high dv/dt and di/di pins like phase, start pins. In general, the current sense resistor should be closed to the insurance company. Other layout arrangements should be adjusted accordingly.

Electronic pins

This pin is held high in enable mode and low in idle mode and is relatively robust. The enable signal should be referenced to the signal ground.

DCIN pin

This pin is connected to the AC adapter output voltage and should reduce noise sensitivity. The copper size of the phase nodes should be kept low and the phase capacitance should be kept low to minimize ringing. It is best to limit phase node copper strictly in accordance with current as well as thermal management applications. Identify the input and output capacitors of the power and signal ground converters, and the terminals of the power bottom switching MOSFET PGND are grounded. Other components should be connected to signal ground. The signal and power ground connections are once together. The clamping capacitor of the switching MOSFET is recommended to be closely connected to the drain of the high-side MOSFET, and the source of the low-side MOSFET, using a ceramic cap. This capacitor reduces noise and power loss in the MOSFET.