SG3524P (SO16) ...

  • 2022-09-23 10:02:16

SG3524P (SO16) Regulating Power Inverter or Switching Regulator

SG3524P (SO16) regulates the power inverter or switching regulator. They can also be used as control elements for high power output applications. The SG3524 series is designed for switching regulators -

Transformer Coupled DC Polarity -

For DC converter, transformerless voltage doubler and polarity converter applications using fixed frequency, pulse width modulation techniques. Dual alternating outputs allow single-ended or push-pull applications.

Each unit includes an onboard reference, error amplifier, programmable oscillator, pulse-controlled flip-flop, two uncommitted output transistors, a high-gain comparator, and current-limit and shutdown circuitry.

block diagram

working principle

The SG3524 is a fixed frequency pulse with a modulating voltage regulator control circuit. The operating frequency of the regulator is programmed by a timing resistor (RT) and a timing capacitor (CT). RT establishes a constant charging current for CT. This results in a linear voltage ramp at CT, which is fed to the comparator, where the output pulse width is linearly controlled by the error amplifier. The SG3524 includes an on-board 5V regulator that acts as a reference and power supply for the SG3524's internal control circuitry and can also be used to provide external support functions. This reference voltage is externally stepped down by a resistive divider to provide a reference in the common-mode range, an error amplifier or an external reference can be used. The power supply output is sensed by a second resistor divider network to generate a feedback signal to the error amplifier. The amplifier output voltage is then compared to the linear voltage ramp at CT. The modulated pulse from the high-gain comparator output is then controlled to the appropriate output pass transistor (QA or QB) by a pulse-controlled flip-flop that is switched synchronously by the oscillator output. The oscillator output pulse is also used as a blanking pulse to ensure that both outputs are never turned on at the same time during the transition time. The punching pulse width is controlled by the CT value. The outputs can be used in a push-pull configuration with half the frequency of the base oscillator, or in parallel in a single-ended application with a frequency equal to the oscillator. The output of the error amplifier shares the common input of the comparator with the current limit of the shutdown circuit and can be overridden by a signal from either of these inputs. This common point is also available externally and can be used to control the gain of the error amplifier or to compensate the error amplifier, or to provide additional control for the regulator.

Typical application data

blanking

The output pulse of the oscillator is used as a blanking pulse at the output. This pulse width is controlled by the CT value. If a smaller CT value is required for frequency control, the oscillator output pulse width can still be increased by applying a parallel capacitor of up to 100pF from pin 3 to ground. If a larger dead time is required, the maximum duty cycle should be limited by limiting the output of the error amplifier. This can easily be done with the following circuit:

Concurrent surgery

When an external clock is required, a clock pulse of approximately 3V can be applied directly to the oscillator output terminal. At this time, the impedance to ground is about 2KΩ. In this configuration, the clock period of the RT CT must be slightly larger than the external clock.

If more than two SG2524 regulators are to be operated simultaneously, all oscillator output terminals should be connected together, all CT terminals should be connected to a single timing capacitor, and timing resistors should be connected to a single RT terminal. The other RT terminals can be left open or shorted to VREF. Minimum lead lengths should be used between CT terminals.

Flyback converter circuit.

Push-pull transformer coupled circuit.