feature

●4.5V to 16V operating input voltage range

50mΩ internal PFET switch, high efficiency: up to 95%

●Internal soft start; output voltage adjustable to 0.8V

3A continuous output current; fixed 500kHz PWM operation

●cycle-by-cycle current limit

●Short circuit protection; output overvoltage protection

● Thermal shutdown; small SO-8 package

application

●Point-of-load DC/DC conversion

●PCIe graphics card

●Set-top box

● DVD drives and hard drives

●LCD panel

●Cable Modem

●Telecom/Network/Data Communication Equipment

General Instructions

The AOZ1017 is an efficient, easy-to-use, $3 product regulator. The AOZ1017 operates over an input voltage range of 4.5V to 16V and provides a continuous output voltage of up to 3A with an adjustable output current of 0.8V.

The AOZ1017 is available in an SO-8 package and is rated over an ambient temperature range of -40°C to +85°C.

typical application

block diagram

Typical performance characteristics

The circuit of Figure 1. T=25°C, V=V=12V, V=3.3V, unless otherwise specified.

Thermal derating curves for typical input and output conditions for an SO 8 package based on the evaluation board.

The circuit of Figure 1. 25°C ambient temperature and natural convection (wind speed <50LFM) unless otherwise specified.

Detailed description

The AOZ1017 is a current mode buck regulator with an integrated high side PMOS switch. It operates from an input voltage range of 4.5V to 16V and provides up to 3A of load current. The duty cycle can be adjusted from 6% to 100%, allowing a wide range of output voltages. Features include enable control, power-on reset, input undervoltage lockout, fixed internal soft-start, and thermal shutdown.

AOZ1017 is available in SO-8 package.

Enable and Soft Start

The AOZ1017 has an internal soft-start function to limit the inrush current and ensure that the output voltage rises smoothly to the regulated voltage. The soft-start process begins when the input voltage rises to 4.0V and the voltage on the EN pin is high. During the soft-start process, the output voltage usually becomes the regulated voltage within 2.2ms, and the 2.2ms soft-start time is set internally.

The EN pin of the AOZ1017 is active high. Connect the EN pin to V if the enable function is not used. Pulling EN to ground will disable the AOZ1017. Don't leave it on. The voltage on the EN pin must be higher than 2.0 V to enable the AOZ1017. The AOZ1017 is disabled when the voltage on the EN pin is below 0.6V. If the application circuit requires that the AOZ1017 be disabled, an open drain or open collector circuit should be used to connect to the EN pin.

steady state operation

Under steady-state conditions, the converter operates in fixed frequency and continuous conduction mode (CCM).

The AOZ1017 integrates an internal P-MOSFET as a high-side switch. The inductor current is sensed by amplifying the voltage drop from the drain to the source of the high-side power MOSFET. The output voltage is reduced by an external voltage divider at the FB pin. The difference between the FB pin voltage and the reference voltage is amplified by an internal transconductance error amplifier. At the PWM comparator input, the error voltage displayed on the COMP pin is compared to the current signal that is the sum of the inductor current signal and the slope compensation signal. If the current signal is less than the error voltage, the internal high side switch is turned on. Inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high side switch is turned off. The inductor current is free-spinning output through an external Schottky diode.

The AOZ1017 uses a P-channel MOSFET as the high-side switch. It saves the bootstrap capacitance typically seen in circuits using NMOS switches. The upper switch is allowed to be turned on 100%, and the linear adjustment operation mode is realized. The minimum voltage drop from V to V is the load current of the MOSFET x the DC resistance + the DC resistance of the buck inductor. Its calculation formula is as follows:

Where: VO_MAX is the maximum output voltage, VIN is the input voltage between 4.5V and 16V, IO is the output current from 0A to 3A, and RDS(ON) is the on-resistance of the internal MOSFET with a value between 40mΩ and 70mΩ between, depending on the input voltage and junction temperature, and the inductance is the DC resistance of the inductor.

On-off level

The AOZ1017 switching frequency is fixed and set by the internal oscillator. Due to device variations, the actual switching frequency can range from 400kHz to 600kHz.

Output voltage programming

The output voltage can be set by feeding back the output to the FB pin and a resistor divider network. in the application circuit shown in Figure 1. The resistor divider network consists of R and R. Typically, a design is started by picking a fixed value of R and calculating the required R using:

Table 1 lists some standard values of R and R for the most commonly used output voltage values.

The combination of R and R should be large enough to avoid drawing too much current from the output, which would result in power loss.

Since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop across the PMO and inductor.

Protection features

AOZ1017 has multiple protection functions to prevent damage to the system circuit under abnormal conditions.

Over Current Protection (OCP)

The sensed inductor current signal is also used for overcurrent protection. Since the AOZ1017 uses peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage is internally limited between 0.4V and 2.5V. The peak current of the inductor is the automatic limit cycle.

The cycle-by-cycle current limit threshold is set between 4A and 5A. When the load current reaches the current limit threshold, the cycle-by-cycle current limit circuit immediately turns off the high-side switch to terminate the current duty cycle. The inductor current stops rising. Cycle-by-cycle current limit protection directly limits the inductor peak current. Due to the limitation of peak inductor current, the average inductor current is also limited. When the cycle-by-cycle current limit circuit is triggered, the output voltage drops as the duty cycle decreases.

The AOZ1017 has internal short-circuit protection to prevent catastrophic failure under output short-circuit conditions. The FB pin voltage is proportional to the output voltage. When the FB pin voltage is lower than 0.2V, the short circuit protection circuit is triggered. As a result, the converter is turned off and hiccups at a frequency equal to 1/8 of the normal switching frequency. After the short circuit fault is cleared, the drive will start with a soft start. In short-circuit protection mode, the average current of the inductor is greatly reduced due to its low disturbance frequency.

Power-On Reset (POR)

A power-on reset circuit monitors the input voltage. When the input voltage exceeds 4V, the inverter starts to work. When the input voltage drops below 3.7V, the inverter will shut down.

Output Over Voltage Protection (OVP)

The AOZ1017 monitors the feedback voltage: when the feedback voltage is higher than 960mV, the PMOS is turned off immediately to protect the output voltage overshoot in fault conditions. When the feedback voltage is lower than 840mV, the PMOS can be turned on in the next cycle.

Thermal Protection

An internal temperature sensor monitors the connector temperature. If the junction temperature exceeds 150°C, turn off the internal control circuit and high-side PMOS.

application information

The basic AOZ1017 application circuit is shown in Figure 1. Component selection is described below.

input capacitor

The input capacitor must be connected to the V pin and PGND pin of the AOZ1017 to maintain a stable input voltage and filter out pulsed input current. The voltage rating of the input capacitor must be greater than the maximum input voltage plus the ripple voltage. The ripple voltage at the input can be approximated by the following equation:

Since the input current of a buck converter is discontinuous, the current stress on the input capacitor is another consideration when choosing capacitors. For a buck circuit, the rms value of the input capacitor current can be calculated by the following formula:

If m is equal to the conversion ratio:

Calculate the relationship between the input capacitor rms current and voltage slew rate as shown in Figure 2 on the next page. It can be seen that the current stress of C is the largest when V is half of V. The maximum current stress of CIN is 0.5x IO.

For reliable operation and optimum performance, the input capacitor must have a current rating higher than I under worst-case operating conditions. Ceramic capacitors are the preferred input capacitors because of their low ESR and high ripple current ratings. Depending on the application circuit, other low ESR tantalum capacitors or aluminum electrolytic capacitors can be used. When choosing ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred due to their better temperature and voltage characteristics. Note that capacitor manufacturers' ripple current ratings are based on a specific lifetime. Actual design requirements may require further derating.

sensor

The inductor is used to provide a constant current output when it is driven by a switching voltage. For a given input and output voltage, the inductor and switching frequency together determine the inductor ripple current, namely:

The peak inductor current is:

High inductance provides low inductor ripple current, but requires larger size inductors to avoid saturation. Low ripple current reduces inductor core losses. It also reduces the rms current through the inductor and switch, thereby reducing conduction losses.

When choosing an inductor, make sure it can handle peak currents without saturation even at the highest operating temperature.

The inductor accepts the highest current in the buck circuit. Conduction losses on inductors need to be checked for compliance with thermal efficiency requirements.

Coilcraft, Elytone and Murata offer surface mount sensors in different shapes and styles. The shielding inductance is small in size, and the radiated electromagnetic interference is small. But they are more expensive than unshielded inductors. The choice depends on EMI requirements, price and size.

Table 2 lists the inductors for some typical output voltage designs.

output capacitor

Select the output capacitor based on the DC output voltage rating, output ripple voltage specification, and ripple current rating.

The voltage rating of the selected output capacitor must be higher than the maximum expected output voltage (including ripple). Long-term reliability requires consideration of degradation.

The output ripple voltage specification is another important factor in selecting an output capacitor. In a buck converter circuit, the output ripple voltage is determined by the inductor value, switching frequency, output capacitor value, and ESR. It can be calculated by the following formula:

Where: CO is the output capacitor value, ESRCO is the equivalent series resistance of the output capacitor.

When using a low ESR ceramic capacitor as the output capacitor, the impedance of the capacitor at the switching frequency dominates. The output ripple is mainly caused by the capacitor value and the inductor ripple current. The output ripple voltage calculation can be simplified as:

When the ESR impedance at the switching frequency dominates, the output ripple voltage is primarily determined by the capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified as:

For lower output ripple voltage over the entire operating temperature range, X5R or X7R dielectric ceramic or other low ESR tantalum or aluminum electrolytic capacitors can also be used as output capacitors.

In a buck converter, the output capacitor current is continuous. The rms current of the output capacitor is defined by the peak-to-peak ripple current of the inductor. The calculation method is as follows:

Usually, the ripple current rating of the output capacitor is a lesser concern due to the low current stress. When the buck inductor is chosen to be small and the inductor ripple current is large, the output capacitor will be overstressed.

Schottky Diode Selection

When the high-side PMOS switch is turned off, an external free-wheeling diode supplies current to the inductor. To reduce diode forward voltage drop and recovery losses, Schottky diodes are recommended. The maximum reverse voltage rating of the selected Schottky diode should be greater than the maximum input voltage and the current rating should be greater than the maximum load current.

loop compensation

The AOZ1017 features peak current mode control for ease of use and fast transient response. Peak current mode control eliminates the bipolar effect of the output L&C filter. This greatly simplifies the design of the compensation loop.

With peak current mode control, the buck power stage can be simplified as a one-pole-one-zero system in the frequency domain. The pole is the dominant pole and can be calculated by the following formula:

The zero is the ESR zero due to the output capacitance and its ESR. Its calculation method is as follows:

Where: CO is the output filter capacitor, RL is the load resistance value, and ESRCO is the equivalent series resistance of the output capacitor.

The compensation design actually obtains the desired gain and phase by changing the closed-loop transfer function of the converter. Several different types of compensation networks can be used with the AOZ1017. In most cases, a series capacitor and resistor network connected to the COMP pin sets the pole zero and is sufficient for a stable high bandwidth control loop.

In the AOZ1017, the FB pin and the COMP pin are the inverting input and output of the internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The rods are:

Where: GEA is the error amplifier transconductance, which is 200×10-6 A/V, GVEA is the error amplifier voltage gain, which is 500 V/V, and CC is the compensation capacitor.

The zero given by the external compensation network capacitor CC and resistor RC is located at:

In order to design the compensation circuit, the target crossover frequency f must be chosen as the closed loop. The system crossover frequency is where the control loop has unity gain. The crossover frequency is also known as the converter bandwidth. Generally, higher bandwidth means faster response to load transients. However, considering the stability of the system, the bandwidth should not be too high. When designing the compensation loop, the stability of the converter under all line and load conditions must be considered.

Typically, it is recommended to set the bandwidth to be less than 1/10 of the switching frequency. The AOZ1017 operates over a fixed switching frequency range of 400kHz to 600kHz. It is recommended to choose a crossover frequency less than 50kHz.

The strategy for choosing R and C is to use R to set the crossover frequency and C to set the compensator zero. Calculate RC with the chosen crossover frequency f:

where fC is the desired crossover frequency, VFB is 0.8V, and GEA is the error amplifier transconductance, which is 200x10-6

A/V and GCS are the transconductance of the current sense circuit, which is 6.68 AC voltage.

Compensation capacitor C and resistor R together form zero. This zero is placed close to the dominant pole f, but below 1/5 of the chosen crossover frequency. C can be selected by:

The above equation can also be simplified to:

An easy-to-use software application that helps design and simulate compensation loops can be found.

Thermal Management and Layout Considerations

In the AOZ1017 buck regulator circuit, high pulse current flows through two circuit loops. The first loop starts with the input capacitor, V pin, LX pin, filter inductor, output capacitor, and load, and returns to the input capacitor through ground. When the high-side switch is turned on, current flows in the first loop. The second loop starts from the inductor, goes to the output capacitor and load, to the anode of the Schottky diode, to the cathode of the Schottky diode. When the low-side diode is turned on, current flows in the second loop.

In the PCB layout, minimizing the area of the two loops can reduce the noise of the circuit and improve the efficiency. It is strongly recommended to use a ground plane to connect the input capacitor, output capacitor and PGND pin of the AOZ1017.

In the AOZ1017 buck regulator circuit, the main power dissipating components are the AOZ1017, the Schottky diode and the output inductor. The total power consumption of the converter circuit can be measured by subtracting the output power from the input power.

Schottky power dissipation can be approximated as:

Where; VFW_Schottky is the forward voltage drop of the Schottky diode.

The power loss of the inductor can be approximated by the output current of the inductor and the DCR.

The actual junction temperature can be calculated using the power dissipation in the AOZ1017 and the thermal impedance from junction to ambient.

The maximum junction temperature of the AOZ1017 is 150°C, which limits the maximum load current capability. See the thermal derating curve for the maximum load current of AOZ1017 under different ambient temperatures.

The thermal performance of the AOZ1017 is greatly affected by the PCB layout. During the design process, the user should take extra care to ensure that the integrated circuit operates under the recommended environmental conditions.

For optimum electrical and thermal performance, some layout tips are listed below. Figure 3 shows an example PCB layout for reference.

1. Do not use thermal connections for V and PGND pins. Maximize the copper area of the PGND and V pins to help with heat dissipation.

2. The input capacitor should be placed as close as possible to the V pin and PGND pin.

3, the preferred ground plane. If a ground plane is not used, separate PGND from AGND and connect them at only one point to avoid PGND pin noise coupling to the AGND pin.

4. Keep the current trace from the LX pin to L to C to PGND as short as possible.

5. Pour copper planes on all unused board areas and connect them to stable DC nodes such as V, GND, or V.

6. The two LX pins are connected to the internal PFET drain. They are the low resistance thermal conduction paths and the noisiest switching nodes. Connecting a copper plane to the LX pin will help with heat dissipation. This copper plane should not be too large or switching noise may couple to other parts of the circuit.

7. Keep sensitive signal traces away from the LX pin.

Package size, SO-8

notes:

1. All dimensions are in millimeters.

2. Dimensions include plating

3. The package size does not include mold flash and gate burrs. Die flash on the non-lead side should be less than 6 mils.

4. Dimension L is measured in the plane of the meter.

5. The control size is in millimeters, and the converted inch size is not necessarily accurate.

life insurance policy

Alpha and Omega Semiconductor products are not authorized for use as critical components in life support devices or systems.

As used in this article:

1. The life support device or system is a key component of the device or 2. Any component of the life system (A) is used in a surgically implanted stent, device or system, and the stent, device or system The failure of the device or system could cause the body or (b) support or sustain life, and (c) when properly used in accordance with the support device or system, would reasonably be expected to render life ineffective or fail to perform, or affect its safety or the instructions for use provided on the label Yes, can be valid. reasonably expected to cause significant harm to the user.