feature

Low cost single (dual) parts ( AD8057 ) and AD8058); high speed: 325 MHz, -3 dB bandwidth (G=+1); 1000 V/µs slew rate; gain flatness: 0.1 dB to 28 MHz; low noise: 7 nV/√Hz; low power; 5.4 mA/amp typical supply current at 5 volts; low distortion -85 dBc at 5 MHz, RL=1 kΩ; supply range from 3 volts to 12 volts; small package: AD8057 can be used for 8-lead SOIC and 5-lead SOT-23 ; AD8058 can be used for 8-lead SOIC and 8-lead MSOP.

application

Imaging; DVD/CD; Photodiode Preamplifiers; Analog to Digital Drive Professional Camera Filters.

General Instructions

The AD8057 (single) and AD8058 (dual) are very low cost, high performance amplifiers. The balance between cost and performance makes them ideal for many applications. The AD8057 and AD8058 reduce the need for certification of various professional amplifiers. The AD8057 and AD8058 are voltage feedback amplifiers whose bandwidth and slew rate are typically found in current feedback amplifiers. The AD8057 and AD8058 are low power amplifiers with low quiescent current and a wide supply range from 3V to 12V. They have the noise and distortion performance required by high-end video systems, as well as DC performance parameters rarely found in high-speed amplifiers.

The AD8057 and AD8058 are available in standard SOIC packages as well as tiny 5-lead SOT-23 (AD8057) and 8-lead MSOP (AD8058) packages. These amplifiers can be used in the industrial temperature range -40°C to +85°C.

Absolute Maximum Ratings

1. Specifications apply to devices in free air: 8-lead SOIC package: θ=160°C/W; 5-lead SOT-23-5 package: θ=240°C/W; 8-lead MSOP package: θ= 200°C/W.

Stresses above the Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device under the conditions described in the operating section of this specification or any other conditions above is not implied. Long-term exposure to absolute maximum rating conditions may affect device reliability.

Maximum power consumption

The maximum power that the AD8057/AD8058 can safely dissipate is limited by the associated rise in junction temperature. Junction temperatures exceeding 175°C for extended periods of time can cause device failure. Although the AD8057/AD8058 have internal short-circuit protection, this may not be sufficient to guarantee that the maximum junction temperature (150°C) will not be exceeded under all conditions. To ensure proper operation, the maximum power derating curve must be observed.

Typical performance characteristics

test circuit

application information

Driving capacitive loads

The impulse response of most op amps suffers from overshoot when driving capacitive loads. Figure 43 shows the relationship between capacitive loading causing 30% overshoot and the closed loop gain of the AD8058. It can be seen that at a gain of +2, the device is stable up to 69pf capacitive loading. In general, to minimize peaking or ensure device stability at larger capacitive load values, a small series resistor (RS) can be added between the op amp output and the load capacitor (CL), as shown in Figure 44 shown.

For the setup shown in Figure 44, the relationship between RS and CL is empirically derived, as shown in Table 4.

video filter

Some composite video signals from digital sources contain some clock feedthrough that can cause problems in downstream circuits. This clock feedthrough is typically 27MHz, which is the standard clock frequency for NTSC and PAL video systems. A filter that passes the video band and rejects frequencies at 27mhz can be used to remove these frequencies from the video signal.

Figure 46 shows the circuit for creating a single 5 V supply, 3-pole Sallen key filter using the AD8057. This circuit uses an RC pole in front of the standard 2 pole active area. To switch the DC operating point to the intermediate supply, R4, R5 and C4 provide AC coupling.

Figure 47 shows the frequency sweep of this filter. At 5.7 MHz, the response is reduced by 3 dB; thus, it passes through the video band with little attenuation. The rejection at 27mhz is 42db, which provides a factor of 100+ to reject the clock component at that frequency.

Differential Analog-to-Digital Converter

When the system supply voltage drops, many ADCs provide differential analog inputs to increase the dynamic range of the input signal while still operating at low supply voltages. Differential drive also reduces second-order and other uniform distortion products.

Analog Devices, Inc. offers a variety of 12- and 14-bit high-speed converters that have differential inputs and can operate from a single 5 V supply. These include the 12-bit AD9220, AD9221, AD9223, AD9224, and AD9225, and the 14-bit AD9240, AD9241, and AD9243. Although these devices can operate over the common-mode voltage range of the analog inputs, they work best when the common-mode voltage at the input is mid-voltage or 2.5 V.

Op amp architectures that require more than 2 volts of headroom at the output will have serious problems trying to drive such an ADC with a positive 5 volt supply. The low headroom output design of the AD8057 and AD8058 makes them ideal for driving this type of ADC. The AD8058 can be used to make a DC-coupled single-ended differential driver for one of the ADCs. Figure 48 is a schematic of such a circuit for driving the AD9225, 12-bit, 25 MSPS ADC.

In this circuit, one op amp is configured in inverting mode and the other op amp is configured in non-inverting mode. However, to provide better bandwidth matching, each op amp is configured with a noise gain of +2. The gain configuration of the inverting op amp is -1, while the gain configuration of the non-inverting op amp is +2. Each produces a noise gain of +2, which is determined only by the inverse of the feedback ratio. The input signal of the non-inverting op amp is divided by 2 to normalize its level and make it equal to the inverting output.

For a 0 V input, the output of the op amp is expected to be 2.5 V, which is the mid-supply level of the ADC. This is accomplished by first taking the ADC's 2.5v reference output and dividing it by 2 with a pair of 1kΩ resistors. The resulting 1.25 V is applied to the positive input of each op amp. This voltage is then multiplied by the +2 gain of the op amp to provide a level of 2.5 V at each output.

The assumption of this circuit is that the input signal is bipolar with respect to ground and the circuit must be DC coupled, implying a negative supply elsewhere in the system. This circuit uses -5 V as the negative supply for the AD8058. Grounding the negative supply of the AD8058 can cause problems at the input of a non-vertical op amp. The input common-mode voltage can only be within 1V of the negative rail. Since this circuit requires the positive input to operate with a 1.25 V bias, there is not enough room for this voltage to swing in the negative direction. The inverter stage does not have this problem because its common-mode input voltage remains at 1.25 V. If DC coupling is not required, various AC coupling techniques can be used to eliminate this problem.

layout

The AD8057 and AD8058 are used for board layouts that follow standard high-speed design rules. Keep all signal traces as short and direct as possible. In particular, keep parasitic capacitance on the inverting input of each device to a minimum to avoid excessive peaking and other undesirable performance. Use a 0.1µF capacitor in parallel with a larger (~10µF) tantalum capacitor to bypass the power supply very close to the package power pins. Connect these capacitors to a ground plane on an inner layer, or fill an area on the board not used for other signals.

Dimensions