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2022-09-15 14:32:14
L6732 Synchronous rectifier can reduce voltage and lower voltage controller (2)
Self -controlling power system
This built -in system avoids the voltage on the self -raising capacitor below 3.3V. The internal comparator sensor is kept charging the voltage on the external self -lifting capacitor, and the low -side MOSFET is finally opened about 200NS. If the capacitance is insufficient, the high -voltage side MOSFET cannot be effectively turned on, it will show higher RDSON. In some cases, OCP may also be triggered. When this soft startup time is long, the capacitor can discharge and load light when the capacitor starts. You can also mention an application condition. During this period, the capacitor can be discharged:
fan power supply
In many applications, the fan is a DC motor driven by the voltage mode DC/DC converter. Essence Usually only the speed of the motor is controlled by changing the voltage applied to the input terminal. Because the current is not directly controlled, the torque cannot be controlled. In order to change the motor speed, the output voltage of the inverter must be changed. L6732 has a dedicated PIN called Earef (see the relevant part), which allows the non -inverse input of external reference errors. In these applications, the duty cycle depends on the speed of the motor, and sometimes 100%set at maximum speed. Unfortunately, the capacitor cannot be charged in this case, and the system cannot work normally. Some PWM controllers limit the maximum duty cycle to 80-90%to keep the guidance with a hat charging, but this makes the performance of the load stamina worse. Because the ""self -controlling power system"" is adopted, L6732 can work 100%without any problems. The following figure shows the reference of equipment behavior when the input voltage is 5V and 100%is set by the external settings.
Application details
inductor design
The inductance value is by the transient response time and efficiency, cost and scale. The inductor must be calculated to maintain the output and input voltage changes to keep the ripple current ( #8710; IL) at the maximum output current. The inductance value can be calculated in the following formula:
Among them, the FSW is the switch frequency, VIN is the input voltage, and VOUT is the output voltage. Figure 17. The relationship between the ripple current and the output voltage under different inductance values u200bu200bis displayed. When the switching frequency is 500kHz, VIN u003d 5V, VIN u003d 12V.
Increasing the electrical value will reduce the ripple current, but at the same time, increase the response time of the converter to the load transient state. If the compensation network is well designed, during the load transient state, the device can set the duty cycle to 100%or 0%. When one of the conditions is met, the response time is changed to the sensor current. During this period, the output current provides a capacitor from the output terminal. The minimum response time can minimize the size of the output capacitor.
Output electricityThe container
The output capacitor is the basic component of the rapid transient response of the power supply. They depend on the requirements of the output voltage ripple and any output voltage deviation load. During the load transient state, the output capacitor transmits to the current to the load or absorbs the current stored in the inductor until the converter reacts. In fact, even if the controller immediately recognizes the load transient and sets the duty cycle to 100%or 0%, the current slope is limited by electrical value. The current output voltage decreases the current changes inside the capacitor (ignored the impact of ESL):
#8710; VOUTESR u003d #8710; IOUT #8901; ESR
In addition, due to effectiveness, due to effectiveness due The capacitor discharge or charging, and there is an additional decrease from the following formulas:
Formula (8) Applicable to the positive load transient, formula (9) for negative negatives (9) for negative negatives (9). Load transient. DMAX is the maximum duty cycle of 100%in L6732. In order to give the electrical sensing value, minimum input voltage, output voltage, and maximum load transient, A can set the maximum ESR and minimum COUT value. ESR and COUT values u200bu200bcan also affect static output voltage ripples. In the worst case, the output voltage ripples can be calculated using the following formulas:
Usually the voltage caused by ESR is the largest, and the voltage drop caused by capacitors is almost possible. can be ignored.
Input capacitors
Entering capacitors must maintain the balanced root current flowing through them, that is:
Among the D is the duty ratio. The equation reaches the maximum value iOUT/2, d u003d 0.5. The loss in this worst case is:
Compensation network
The circuit is based on voltage mode control (Figure 18). The output voltage is adjusted to the internal/external reference voltage and is zoomed through the external resistor division. The error then uses VC2OMP to modulate pulse width (VC2Opp) compared with the pulse width modulation (VC) node. This waveform is filtered through the output filter. The modulator transmission function is a small signal transmission function of VOUT/VCOMP. This function has a bipolar at the frequency FLC, depending on the ESR of the L-COUT resonance according to the ESR of the output capacitor, and the FESR is zero. The DC gain of the modulator is simply speaking, input voltage VIN except the peak to the peak oscillator voltage: VOSC
The compensation network consists of internal errors, the impedance network Zin (the impedance network Zin ( R3, R4 and C20) and ZFB (R5, C18 and C19). The compensation network must provide a closed -loop transmission function with the highest 0DB cross -frequency, with the fastest transient response (but always lower than FSW/10) and DC barsThe highest gain under the piece is adjusted by minimizing the load. The gain of a stable control loop on the 0db axis is -20db/decade slope is greater than 45 degrees. The positioning network of compensation poles and zero points can be used. Get the need to get the required converter bandwidth
- Place ωz1 before the output filter resonance ωlc
- Place ωz2 at the output filter resonance at the point of resonance at the output filter ωlc
- Place ωp1 at the output capacitor ESR at 0Ωesr
-Mymal at half of the switching frequency
- Consider the error placing the large device to open the loop gain, check the circuit gain gain Essence
L6732 Demonstration Board
PCB layout and PCB board description
L673220A demonstration board achieved a lower -pressure DC on the four -layer PCB /DC converter device in general applications. The range of input voltage is 4.5V to 14V, and the output voltage is 3.3V. The module can exceed 20A. The switch frequency is set to 250kHz (the controller runs FSW freely), but it can be set to 500kHz for EareF pin.
5A board description
l6732 5a demoBoard A lower -voltage DC/DC converter is implemented on the layer PCB, and the operation of its implementation method device in general applications is given. The input voltage range is 4.5V to 14V, and the output voltage is 3.3V. The module can provide an output current of up to 5A. The switching frequency is set to 250kHz (the controller runs FSW freely), but it can be set to 500kHz acting on earrings. Compared with the 20A version, the only difference is that compared with the first piece, there is a dual MOSFET chip on the board for high -end and low -side MOSFETs; in addition, inserted between the high side MOSFET gate and phase and the phase insertion R15 pin; R14 inserts between the low side MOSFET gate and PGND pins.