feature

• Patented primary side adjustment technology

• No optocoupler

•First-class constant voltage and constant current accuracy

• Low EMI

• Proprietary quick start circuit

•Built-in soft-start circuit

• Integrated circuit and primary inductance compensation

• Integrated programmable output line resistance compensation

• Line undervoltage, output overvoltage, output short circuit and over temperature protection

• Meets all global energy efficiency and CEC average efficiency standards

• Adjustable power from 2W to 7W

• Minimal external components

• Tiny SOT33-6 package

application

• Chargers for cell phones, PDAs, MP3s, portable media players, DSCs and other portable devices and devices

• RCC adapter replacement

• Replace the linear adapter

• Backup and auxiliary power

General Instructions

The ACT361 belongs to the high performance patented ActivePSRTM family of universal input AC/DC offline controllers for battery charger and adapter applications. It is designed for flyback topology operating in discontinuous conduction mode (DCM). The ACT361 meets all global energy efficiency regulations (CEC, European Blue Angel and US Energy Star standards) while using few external components.

The ACT361 ensures safe operation and provides full protection against all fault conditions. Built-in protection circuits are provided for output short circuit, output overvoltage, line undervoltage, and overtemperature conditions.

The ACT361 ActivePSRTM is optimized for high-performance, cost-sensitive applications and utilizes Active Semi's proprietary primary-side feedback structure to provide precise constant voltage, constant current (CV/CC) regulation without the need for optocouplers or reference devices. The integrated circuit and primary inductance compensation circuit provide accurate constant current operation despite large variations in line voltage and primary inductance. Integrated output line resistance compensation further improves output accuracy. The ACT361 achieves good regulation and transient response, but requires less than 150mW of standby power.

The ACT361 is optimized for 2W to 7W applications. It is available in a space saving 6-pin SOT2 3-6 package.

Figure 1: Simplified Application Circuit

Functional block diagram

Function description

As shown in the functional block diagram, in order to regulate the output voltage in CV (Constant Voltage) mode, the ACT361 compares the feedback voltage at the FB pin with an internal reference voltage and generates an error signal to the preamplifier. After the error signal is filtered and compensated by the internal compensation network, it is controlled by current mode PFWM (pulse frequency and width modulation) to modulate the peak current of the external NPN transistor at the CS pin. To regulate the output current in CC (Constant Current) mode, the oscillator frequency is modulated by the output voltage.

SW is the driver output that drives the emitter of the external high voltage NPN transistor. This base-emitter drive method maximizes the efficiency of the drive circuit.

Quick Start

VDD is the power terminal of the ACT361. During startup, the ACT361 typically consumes only 20µA of supply current. The start-up resistor from the rectified high voltage DC rail supplies current to the base of the NPN transistor. This will result in an amplified emitter current output to VDD through the switch pins of the active semiconductor dedicated fast start circuit until it exceeds the VDDON threshold of 19V. At this point, the ACT361 enters the internal start-up mode and the peak current limit rises within 10ms. After the switch is activated, the output voltage starts to increase. The VDD bypass capacitor must power the ACT361 internal circuitry and NPN-based driver until the output voltage is high enough to maintain VDD through the auxiliary winding. The VDDOFF threshold is 5.5V; therefore, the voltage on the VDD capacitor must remain above 5.5V while the output is charging.

Constant Voltage (CV) Mode Operation

In constant voltage operation, the ACT361 captures the auxiliary flyback signal at the FB pin through the resistor divider network R8 and R9 in Figure 6. The signal at the FB pin is pre-amplified according to the internal reference voltage, and the secondary side output voltage is extracted according to Active Semiconductor's proprietary filter structure.

This error signal is then amplified by an internal error amplifier. When the secondary output voltage is higher than the specified value, the error amplifier output voltage decreases and the switch current decreases. When the secondary output voltage is lower than the specified value, the output voltage of the error amplifier increases, so that the switch current increases, so that the secondary output returns to the specified value. The output regulation voltage is determined by the following relationship:

where RFB1 (R8) and RFB2 (R9) are the upper and lower feedback resistors, NS and NA are the transformer secondary and auxiliary turns, and VD is the rectifier diode forward voltage drop at approximately 0.1A bias.

Standby (No Load) Mode

In no-load standby mode, the ACT361 oscillator frequency is further reduced to a minimum frequency, while the current pulses are reduced to a minimum level to minimize standby power. The actual minimum switching frequency is programmable through the output preload resistor.

loop compensation

The ACT361 integrates loop compensation circuitry that simplifies application design, optimizes transient response and minimizes external components.

Output cable resistance compensation

The ACT361 provides programmable output cable resistance compensation during constant voltage regulation, monotonically increasing the output voltage correction to a predetermined percentage at full power. There are four levels of programmable output cable compensation by connecting a resistor (R4 in Figure 6) from the SW pin to the VDD pin. The percentage at full power is programmable to 3%, 6%, 9%, or 12%, using resistor values of 300k, 150k, 75k, or 33k, respectively. If there is no resistive connection, there is no cable compensation.

This feature allows for better output voltage accuracy by compensating for output voltage drops caused by output cable resistance.

Constant Current (CC) Mode Operation

When the secondary output current reaches the level set by the internal current limit circuit, the ACT361 enters a current limit condition and causes the secondary output voltage to drop. As the output voltage decreases, the flyback voltage also decreases proportionally. An internal current-shaping circuit adjusts the switching frequency according to the flyback voltage so that the power transferred remains proportional to the output voltage, resulting in a constant secondary-side output current distribution. In each switching cycle, the energy transferred to the output is 1/2 (LP×ILIM2)×η, where LP is the primary inductance of the transformer, ILIM is the primary peak current, and η is the conversion efficiency. According to this formula, the constant output current can be derived:

where fSW is the switching frequency and VOUTCV is the nominal secondary output voltage.

Constant current operation typically extends below 40% of the rated output voltage regulation.

Primary inductance compensation

The ACT361 integrates a built-in patented (patent pending) primary inductance compensation circuit to maintain constant current regulation despite variations in transformer manufacturing. The compensation range is ±7%.

Primary Inductor Current Limit Compensation

The ACT361 integrates a primary inductor peak current limit compensation circuit to achieve constant input power over line and load range.

Protect

The ACT361 has various protection functions including over voltage, over current and over temperature.

Output short circuit protection

When the secondary side output is shorted, the ACT361 enters hiccup mode operation. In this case, the VDD voltage falls below the VDDOFF threshold and the auxiliary supply voltage collapses. This will shut down the ACT361 and cause it to restart. This hiccup continues until the short circuit is removed.

Output overvoltage protection

The ACT361 includes an output overvoltage protection circuit that shuts down the IC for 4 consecutive switching cycles when the output voltage is 40% higher than the normal regulation voltage. When an output overvoltage fault is detected, the ACT361 enters hiccup mode.

Over temperature shutdown

A thermal shutdown circuit detects the ACT361 mold temperature. The typical overtemperature threshold is 135°C with a 20°C hysteresis. When the mold temperature rises above this threshold, the ACT361 is disabled until the mold temperature drops by 20°C, at which point the ACT361 is re-enabled.

typical application

Design example

The following design example shows the process of using the ACT361's DCM flyback converter. Referring to the application circuit in Figure 6, the design of the charger application starts with the following specifications:

The operation of the circuit shown in Figure 6 is as follows: Rectifier bridges D1-D4 and capacitors C1/C2 convert the AC line voltage to DC voltage. This voltage supplies the primary winding of transformer T1 and starting resistors R1/R2. The primary power supply current path consists of the primary winding of the transformer, the NPN transistor, the ACT361 internal MOSFET and the current sense resistor R7. A network consisting of capacitor C3 and diode D5 provides the VDD supply voltage to the ACT361 from the auxiliary winding of the transformer. C3 is the decoupling capacitor for the start-up supply voltage and the energy storage element. Diode D7 and capacitor C7 rectify and filter the output voltage. A resistor divider consisting of R8 and R9 programs the output voltage.

Minimum and maximum DC input voltages can be calculated:

where η is the estimated circuit efficiency, fL is the line frequency, tC is the estimated rectifier on-time, and CIN is the empirically selected 2 × 4.7 μF electrolytic capacitor based on the 3 μF/W rule of thumb.

When the transistor is turned off, the voltage on the collector of the transistor consists of the input voltage and the reflected voltage from the secondary winding of the transformer. There is a ringing on the rising edge of the flyback voltage due to the leakage inductance of the transformer. If an RCD network is used, this ringing will be clamped by it. This clamping voltage is designed to be 50V below the breakdown voltage of the NPN transistor. The flyback voltage must be considered when selecting the maximum reverse voltage rating of the secondary rectifier diode. If a 40V Schottky diode is used, the flyback voltage can be calculated:

where VDS is the Schottky diode forward voltage, VDREV is the maximum reverse voltage rating of the diode, and VOUTCV is the output voltage.

At low voltage 85VAC, the maximum duty cycle is set to 35% and the circuit efficiency is estimated to be 70%. Then the full load input current is:

The maximum input primary peak current duty cycle is 35% at full load:

The primary inductance of the transformer:

where fSW is the full load frequency in CV mode. Primary and secondary turns ratio NP/NS:

The ratio of auxiliary turns to auxiliary turns NA/NS:

where VDA is the diode forward voltage on the auxiliary side.

Select the EE16 transformer gap iron core whose effective inductance ALE is 117nH/T2. The number of turns of the primary winding is:

The number of turns of the secondary and auxiliary windings can be derived accordingly:

The current sense resistor (RCS) determines the current limit according to the following equation:

where Fsw is the frequency in CC mode. The voltage feedback resistors are selected as follows:

where K is the IC constant, K=126237.

When selecting the output capacitor, it is recommended to use an electrolytic capacitor with low ESR to reduce the ripple of the current ripple. The approximate formula for the output capacitor value is as follows:

470μF electrolytic capacitor is used to make the ripple small.

Printed Circuit Board Layout Guidelines

Good printed circuit board layout is the key to optimum performance. The decoupling capacitor (C3), current sense resistor (R7), and feedback resistors (R8/R9) should be placed close to the VDD, CS, and FB pins, respectively. There are two main power path loops. One consists of C1/C2, primary winding, NPN transistor and ACT361. The other is the secondary winding, rectifier D7 and output capacitor (C7). Keep these loop areas as small as possible. Connect the high current ground return, the input capacitor ground lead, and the ACT361 G pin to a single point (star ground configuration).

VFB sampling waveform

ACT361 senses the output voltage information through the VFB waveform. In order to make the integrated circuit work in a stable operating state, a suitable VFB waveform is required. In order to avoid false sampling, due to the influence of leakage inductance and circuit parasitic capacitance, a blanking time of 1.38μs is added to blank the ringing period.

Figure 2 is the recommended VFB waveform to ensure the correct sampling point so that the output information can be sent back to the IC for proper control.

Figure 3: Universal AC Input, 5V/0.7A Output Charger

Table 1: ACT361 Bill of Materials

Typical Performance Characteristics (Figure 6 circuit unless otherwise specified.)

Packaging Outline

SOT33-6 Packaging Dimensions

Active Semiconductor Corporation reserves the right to modify circuits or specifications without notice. Users should evaluate each product to ensure it is suitable for their application. Active semi-finished products are not intended or authorized for use as critical components in life support devices or systems. Active Semi, Inc. assumes no liability whatsoever arising out of the use of any product or circuit described in this data sheet, and does not assign any patent licenses.