The ISL54103 DDC Accelerator (DDCA) is a dual active pull-up bus termination that increases data transfer speed on the DDC 2-wire serial bus interface. DDCA uses two internal voltage references per channel and two comparators. After the voltage on the data line exceeds the first threshold (VTRIPL), the boost pull-up current source speed transition is initiated. When the voltage exceeds the second threshold (VTRIPH), the boost pull-up current source is deactivated, keeping the 275 µA active pull-up current queued. When both channels are high, the pull-up current is reduced to 100µA on both lines to save power. Internal logic ensures that active and boost pull-up currents do not activate the source during down transitions. The level of VTRIPH is controlled by the bandgap voltage referenced to VDD. This feature enables switching behavior for all supply voltages between 2.7V and 5.5V. Noise filters on each channel prevent circuit response from exceeding the voltage time threshold. To start the boost circuit, the input must exceed VTRIPL by 100 Vns (typ) (see Figure 10). DDCA allows the bus to operate at up to 100kHz despite capacitive loading of multiple devices and/or long PC board traces. Enhanced ESD protection turns on accelerator pins guaranteed to withstand 8kV electrostatic discharge (HBM) events. The DDC accelerator provides a basic function in the DDC application of distributed capacitance DDC wires in long video cables. By incorporating DDCA, systems using DDC can reliably increase the bus load, allowing longer cables without the risk of data corruption.

feature

Active termination of DDC lines

Improve system bus signal rise time

More reliable HDCP performance and cable extension in video multiplexers

Increase maximum cable length while maintaining data integrity

2.2mA current boost when transitioning from low to high

8kV ESD protection on SDA and SCL pins

Wide operating voltage range: 2.7V to 5.5V

Small Package-5LD SOT-23

Lead-free (RoHS compliant) target applications

video multiplexer

video cable extender

Video Distribution Amplifier

television

computer monitor

projector

Absolute Maximum Ratings Thermal Information

supply voltage range. -1V to 6.5V

Operating Junction Temperature. +135 degrees Celsius

Storage temperature range. -65°C to +150°C

voltage on the pin. -0.3V to VDD+0.3V

ESD Minimum Other Pin (HBM). >2kV

ESD DDC1 and DDC2 pins (HBM). >8kV

Lead-free reflow profile.

Recommended Operating Conditions

temperature. -40°C to +85°C

voltage. 2.7V to 5.5V

NOTE: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to these conditions may affect product reliability and cause failures outside of the warranty

Electrical specifications at all operating conditions, unless otherwise specified, typical at VDD=3.3V and TA=+25°C

notes:

5. Measure the area under the triangle waveform above VTRIPL, time as the benchmark, and the vehicle identification number as the height (see Figure 10).

6. Ensure compliance with data sheet limits by one or more methods: production testing, characterization, and/or design.

Function description

DDC Overview DDC is an I2C-based standard. A clock (SCL) and a data line (SDA) are used between the devices. Both of these are bidirectional. Each signal goes through a current source or pull-up resistor (see "System Diagram" on page 3). When the bus is free, both lines are high. The output stage of all devices connected to the bus must have an output stage for Perform wired sum functions. Simple pull-up resistors on clock and data lines work well unless there are long signal lines. The capacitance of the combined long cables increases signaling, making communication unreliable or out of bus timing specifications. Smaller resistor values can sometimes compensate for the extra capacitance, but this increases the current consumption when the signal line is pulled low. The ISL54103 operates to improve the operational efficiency of the DDC. Capacitors are present, and the ISL54103 provides an active pull-up using a switched current source. When the bus is idling Both lines are high, and the 100µA standby pull-up current is used to maintain signal level consumption while minimizing power. When either signal is pulled low, the 275µA active on Sourcing current maintains good capacitance noise margin

When the bus is released, it will be horizontal by the ISL54103 at a voltage over a period of time. This voltage time combination filter filters out noise on the signal line. Once the ISL54103 detects a valid rising edge, the 2.2mA boost current quickly pulls the bus high (see Figure 8). This stimulates the current-off threshold and the pull-up current to return to the active level when the input level reaches VTRIPH. If both inputs are high, the pull-up current drops to a standby level of 100µA.

The ISL6118 is a dual-channel, fully independent overcurrent (OC) fault protection IC for +2.5V to +5.5V environments. The unit features internal current monitoring, accurate current limiting, an integrated power switch and limited delay for current system protection latching. The ISL6118 current sense and limit circuit sets the rated current limit to 0.6A, ideal for 3.3V auxiliary ACPI applications. ISL6118 is the most ideal HIP1011D and HIP1011E dual PCI supporting chip hot-plug controller. These, along with the ISL6118, control four legacy PCI voltages (±12V, +3.3V, +5V) and a 3.3V AUX for power control for two PCIs respectively, compliant with the Slot Specification Version 1.1 of the PCI Bus Power Management Interface. Designed to be co-located on the motherboard as the HIP1011D, the ISL6118 provides OC fault notification, accurate current limiting, and consistent time latching to isolate and protect all PCI busses during the presence of OC events or short-circuit power states as defined by the PCI specification. The 12m blocking time is independent of adjacent switch electrical or thermal conditions and the OC response time is inversely proportional to the OC value. Each ISL6118 integrates two 80mΩ N-channel MOSFET power switches in an 8-lead SOIC for power control. Each switch is driven by a constant current source so that the output has a controlled rise voltage. This provides a soft-start switch to eliminate voltage sags caused by magnetizing inrush current during bus charging over heavy-load capacitors. Independent enable input and fault report output for each channel with 3V and 5V logic, allowing external control and monitoring. The ISL6118 undervoltage (UV) feature prevents the output unless the correct enable state and VIN >2.5V. Fault reporting is prevented by masking the fault signal during initial startup of the ISL6118. The rising and falling outputs are current-limited voltage ramps with limited inrush current and voltage slew rate, independent of the load. This reduces the need for external EMI filters due to surge and elimination. During operation, once an OC condition is detected the appropriate output current is limited for 12 ms to allow transient conditions to pass. If the current limit period has elapsed, the output latches off by pulling the corresponding fault low. The fault signal is latched low until the enable signal is deasserted, at which point the fault signal will clear.

feature

80mΩ Integrated Power N-Channel MOSFET Switch

Precise current sensing and limiting

12 ms fault-delayed latch, no thermal dependency

2.5V to 5.5V Operating Range

Disable output internally pulled low

undervoltage lockout

Controlled ramp opening time

Channel independent fault output signal

Channel Independent Logic Level Enable High Input (ISL6118H) or Enable Low Input (ISL6118L)

Pb free tier option available

Tape and Reel Packaging with '-T' Part Number Suffix

application

ACPI 3.3V Auxiliary Control

Electronic circuit limits and circuit breakers

Absolute Maximum Ratings Thermal Information

Supply voltage (VIN to ground). 6.0 Volts EN, fault. -0.3V to 6V out. Ground -0.3V to VIN +0.3V output current. Short Circuit Protection Electrostatic Discharge Ratings Human Body Model (per MIL-STD-883 Method 3015.7). 3 kV operating condition temperature range. -40°C to 85°C supply voltage range (typical). 2.7V to 5.5V Thermal Resistance (Typical, Note 1) θJA (Celsius/Watt) SOIC Package. 116 maximum junction temperature. 150 degrees Celsius maximum storage temperature range. -65°C to 150°C maximum lead temperature (10s for soldering). 300 degrees Celsius (SOIC - lead only)

CAUTION: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a pressure rating and operation of the device under the above or any other conditions stated in the operating section of this specification is not implied.

notes:

1. θJA is measured with components mounted on a high-efficiency thermal conductivity test board in free air. See Technical Bulletin TB379 for details.

2. Unless otherwise specified, all voltages are relative to ground.

Electrical Specifications Supply Voltage = 3.3V, TA = TJ = -40 to 85°C unless otherwise specified

introduce

The ISL6118 is a fully independent dual-channel overcurrent (OC) fault protection IC for +2.5V to +5.5V environments. Each ISL6118 contains two 80mW N-channel MOSFET power switch controls in an 8-lead SOIC package. The resistance curve of the integrated FET is shown in Figure 2. Separate enable inputs and fault report outputs are compatible with 3V and 5V logic, allowing external control and monitoring. The device features internal current monitoring, precise current limit, integrated power switch and current limit timing delay for system protection latching. Key Features Description and Operation UV Lockout The ISL6118 undervoltage (UVLO) lockout prevents the device from functioning unless the correct enabled state VIN > 2.5 volts. The soft-start constant 500nA current source causes the gate of the switch to rise to produce a voltage follower effect on the output voltage. This provides soft-start, eliminating the droop capacitance caused by the bus voltage inrush current charging large loads. Rising and falling output current limited voltage ramps so that inrush current and voltage slew rate are limited, independent of load. This reduces power sags due to surges and also eliminates external EMI filters required by other IC products. See Figure 3 for the soft-start waveform. Fault Blanking at Startup During initial startup, the ISL6118 prevents disturbing faults by clearing the fault signal for 12 ms. This blanking eliminates external RC filters required by other vendors' products. The current regulation ISL6118 integrates a current-sensing mosfet on the power supply that allows fast control of OC events. Once an OC condition is detected the ISL6118 enters its current state regulation (CR) control mode. The ISL6118 CR level is set to a nominal value of 0.6A, regulated to within ±25% of full scale over temperature, bias range and OC value. The speed of this control is proportional to the level of the optocoupler. Therefore hard OC controls the condition faster than edge OC. Current regulation is shown in Figure 4 to Figure 7 for performance curves and waveforms.

Latching time delay

The main function of any OC protection device is to rapidly isolate the voltage bus from the faulty load. Unlike other manufacturers' temperature-sensing IC products that isolate faulty loads, the ISL6118 uses an internal 12-millisecond timer that starts on OC detection. Once an OC condition is detected, the corresponding output is current limited for 12 ms, leaving the transient condition on lock. The time to lock is related to the electrical state of the device's thermal switch or adjacent switches. See Figure 10 for an illustration of the independent latch closing waveforms. If the OC condition still exists after the ISL6118 is locked and the fault has been asserted and the enable is not removed, the ISL6118 (unlike other IC devices) does not send a series of consecutive fault pulses to the controller. The single fault signal of this ISL6118 is sent when the latch is closed. Slow and Fast Shutdown The ISL6118 has two shutdown modes. Load current below the current regulation (CR) level when disabled ISL6118 uses 500nA to turn off the constant current source controlled ramp in a controlled manner. When disabled, during CR or if the timer has expired quickly, the ISL6118 pulls the output low, quickly troubleshooting loading from the voltage bus. The waveforms for each shutdown mode are shown in Figures 8 and 9. Over-Temperature Shutdown Although the ISL6118 has a thermal shutdown feature, a 12ms timer shutdown is invoked at extremely high ambient temperatures. Active Output Dropdown Another unique ISL6118 feature is that when the device is disabled, the output is 300mV above ground. Figure 1 shows the operating waveforms of the ISL6118, showing the relationship between various I/O signals under typical and fault conditions. It also graphically highlights the many terms and modes of operation referenced to this data sheet. Using the ISL6118EVAL1 Platform General and Bias Information The ISL6118EVAL1 platform (Figure 14) allows the evaluation of the ISL6118 dual-supply control chip and its comparison against appropriately sized PPTC components. The evaluation platform passes multiple test points (TP#). See Table 1 for assignments and descriptions for test points.

Using the ISL6118EVAL1 platform with the proper bias, the PPTC F1 is rated for 400mA of current through it, it's that particular device. Disassembling the PPTC is necessary to isolate the ISL6118 because the PPTC load current is biased against the ISL6118EVAL1 connection. Enable one or both of the ISL6118H switches to send a high signal (>2.4V) to TP3 and/or TP4 by also loading the nominal 400mA. Test points are provided to evaluate voltage loss across the PPTC (TP9-TP10), as well as across the ISL6118 enabled switches (TP9-TP6 and TP7). Expect voltage losses on PPTC than ISL6118 (see Figure 11 Loss Comparison for ISL6118 vs PPTC voltage). An overcurrent (OC) condition can drive TP11 to +6V on the ISL6118 and PPTC, causing SW1 to shut down and apply a nominal 0.94mA load. This represents the current overload of the ISL6118, so the fast current regulates to the 600mA limit. If the OC lasts longer than the internal nominal 12ms ISL6118 timer, then the output latches and the fault output is pulled low, turning on the appropriate fault indicator. (Please note: FAULT-1 and FAULT-2 are reversed.) The evaluation board is designed to only invoke the OC condition on channel 2 (TP4) so that the presence of the OC condition can be evaluated. The main function of any OC protection device is to rapidly isolate the voltage bus from the faulty load. Unlike IC products from PPTC and other suppliers, the ISL6118's internal timer activated upon OC detection provides temperature-independent compliance protection. Figures 11 to 13 illustrate the comparative efficiency and the effectiveness of the ISL6118 and PPTC in terms of protection to isolate faulty loads and prevent the system from sagging the bus in the system.

Implementing an auto-reset hot-swap controller on the ISL6118H abstracts away the cost, complexity or requirement of a system controller and an autonomous power supply requiring control functions, one that can monitor and need to prevent excessive current faults. This demonstrates how to implement such an autonomous controller using the ISL6118HIB. This app only works with the "H" version of these devices. The "H" version refers to the enable function that asserts on high input.

introduce

The ISL6118, ISL6119, and ISL6121 are all 2.5V to 5V power supply controllers with different current levels (CR) for each controller. ISL6118 and ISL6119 have 2 independent controllers with CR rating of 0.6A and 1.0A ISL6121 is a single power supply controller with 2A CR rating. Each of these devices features an integrated power switch for power control. Each switch is driven by a constant current source to increase the output voltage. This provides a soft-start closing to eliminate the bus voltage dips when charging the heavy-load capacitors. This independent enable input and fault report output per channel is an automatic reset application. An undervoltage (UV) function prevents the output unless the enable pin and VIN are initially turned on. The ISL6118 prevents fault reporting by turning off the fault signal. The rising and falling outputs are current-limited voltage ramps that allow both inrush current and voltage slew rate to be limited, independent of the load. This reduces power sag due to surges, eliminating the need for external EMI filters. During operation, the output current is limited to the appropriate level for 10 milliseconds in response to an OC detected condition to allow transient conditions to pass. If the current limit is still elapsed after the current limit period, the output latch is turned off and the fault report is pulled low by the corresponding fault. The fault signal is latched low until reset by de-asserting the enable signal, at which point the fault signal will clear. It is this described sequence of events that allows the cost-effective implementation of the auto-reset function by simply adding an RC network to the channels of typical applications. Figure 15 shows suggested component values and associated pin configurations for each auto-reset channel.

Initially, when voltage is applied to VIN, the pull-up resistor (Rpu) provides pull-up to VIN on both enable pins asserted and output on FLTn pin once VIN > 2.5V . When an overcurrent (OC) occurs, the IC provides CR protection for 10ms, then the FLTn pin is pulled low through Rpu, and ENABLE is pulled low, thereby resetting the device fault state. At this point, Rpu rises toward cap and the voltage on the ENABLE/FLTn node until ENABLE > 2.0 and the output is asserted again. This automatic reset cycle will continue until the OC fault is no longer present on the output. In this mode of operation the IC thermal protection triggers a switch timing adjustment cycle after a few seconds to prevent excessive power dissipation to protect itself and surrounding circuits. See Figure 16 for operating waveforms.