Features

The voltage range is 14V to 14V

The power supply voltage range is 4.5V to 14V

output voltage can be adjusted to 0.6V

± ± ± 0.8%line voltage accuracy and temperature (0 ° C ~ 125 ° C)

fixed frequency voltage mode control

tons below 100ns

0%to 100%to occupy the duty kitchen Compared with

External input voltage benchmark

Soft start and inhibition

Large current embedded drive

Predictive anti -cross -conducting control

Programmable high -end and low -end RDS (ON)

Sensing overcurrent protection

Available switch frequency 250kHz/500 Kenhez

Pre -definition startup capability

[

123] Good power output

180 ° phase master/from synchronization

transfer

overvoltage protection

Hot shutdown

Packaging: Htssop16

Application

LCD and PDP TV

High-performance/high-density DC-DC module

low-voltage distributed DC-DC

] NIPOL converter

DDR memory power supply

graphics card

Summary description

This controller is achieved The integrated circuit is a high-performance antihypertensive DC-DC and NIPOL converter. It is designed to drive the N -channel MOSFET in the synchronous rectification buck topology. The output voltage of this converter can be accurately adjusted to 600 millivolves, the maximum tolerance is ± 0.8%, and the external benchmark of 0 to 2.5 volts can also be used. The input voltage range is 1.8V to 14V, and the range of the power supply voltage is 4.5V to 14V. The peak current door driver provides fast switching to the external power supply part, and the output current can exceed 20A. The PWM duty cycle can be used between 0%and 100%(tons, minutes) below 100 nan second seconds, which can achieve a very low conversion of the duty cycle ratio at high switching frequency. The device provides voltage mode control, including optional frequency oscillator (250kHz or 500kHz). The error release large instrument has a 10MHz gain bandwidth and the conversion rate of 5V/μs, allowing fast transient response to high bandwidth. Equipment monitoring currents through high -sides and low -side MOSFET RDS (ON), eliminating the fluid resistance resistance, and ensuring that all shouldUse conditions. When necessary, the two different current limiting protection can be set up through two external resistors. In the soft start -up phase, after the soft start, the device of the constant current protection time is provided to enter the card resistance mode. During the soft start, the function of the Sink mode is disabled in order to start the conditions normally at the pre -defined voltage output voltage. After the soft start, the device can absorb the current. Other functions are very good. The HTSSOP16 package allows a compact DC/DC converter.

Electric characteristics

VCC u003d 12V, TA u003d 25 ° C, unless there are other regulations.

Device description

oscillator

By setting the appropriate switching frequency, the switching frequency can be fixed to two values: 250kHz or 500khzarefff The voltage at the pin (see Table 3. Internal and external reference in Section 4.3).

Internal LDO

Internal LDO is powered by the internal circuit of the device. The input at this stage is VCC pin and output (5V) is VCCDR pin (Figure 3).

LDO can be bypass and provide 5V voltage directly to VCCDR. In this case, VCC and VCCDR pins must be shortened together, as shown in Figure 4. The VCCDR pin must be filtered with AT during the rechargement of the self -lifting capacitor, and at least 1 μF capacitor can maintain the internal LDO. VCCDR also represents the reference voltage of the PGOOD pin (see Table 3). Pin function).

Bypass LDO to avoid voltage drops under low VCC

If VCC≈5V, the internal LDO works in a voltage drop, and the output resistance is about 1 . This maximum LDO output current is about 100mA, so the output voltage drops to 100mV to avoid this, which can bypass LDO.

Internal and external reference

can be normal by setting the EAREF pin voltage. The maximum value of the external reference depends on

VCC: When VCC u003d 4V, the working voltage of the clamping clamp is about 2V (typical value), and the largest external reference voltage when VCC is greater than 5V is 2.5V (typical value) Essence

From 0%to 80%of Vearef- GT; external reference/fsw u003d 250kHz

from 80%to 95%Vearef- GT; VREF u003d 0.6V/FSW u003d 500kHz

9 from VCCDR 95%to 100%Vearef- GT; VREF u003d 0.6V/FSW u003d 250kHz

Provide an external reference voltage from 0V to 450MV. The output voltage will be adjusted, but some restrictions must be considered:

[[

[[

[ 123] The minimum OVP threshold is set to 300mv

Impurd pressure protection can not work

PGOOD signal is kept low

To set the resistor division, you must consider 100K drop -down resistors Integrated to device (see Figure 5). Finally, the voltage at the EAREF must be considered when the VCC is about 4V, and the device captures the tube foot when starting.

Soft start

When VCC and VIN are higher than its opening threshold (VIN is monitored by OCH pin) start phase. Otherwise, the SS pins will be short -circuited on the ground. When starting, the A slope is generated by charging the external capacitor CSS through the internal current generator. The initial value of this current is 35 μA, which is charged to 0.5V to the capacitor. After 10 μA until the final charging value was about 4V (see Figure 6). The error output amplifier is clamped with this voltage (VSS) until the programming value is reached. The activity can be observed if the VSS is lower than 0.5V and the two MOSFETs are closed. When VSS is a low signal between the field effects between 0.1V and 1.5V, the duty ratio is 0%. When the VSS reaches 1.1V (the lower limit of the oscillator triangle wave), even if the high side MOSFET starts the switch and the output voltage starts to increase. L6732 can only provide a current in the soft start -up phase to manage the application to start the application. This means that when the voltage is greater than 0.5V, the VSS output voltage is greater than 0.5V1.1V low -side MOSFETs closed (see Figure 7 and Figure 8).

L6732 can be absorbed or source current after the soft start phase (see Figure 9). If the current is detected during the soft start -up phase, the device provides constant current protection. In this way, when the soft start time and/or the inductance value value and/or high, the output capacitance value is output. When the high -ripple current appears during the soft startup process, the inverter can start in any case to limit the current (see Section 4.6 Supervision and protection), but cannot enter the snoring mode.

During the normal operation period, if any underwriting voltage was detected on one of the two power supplies, the SS pin was short -circuited inside the ground, so the SS capacitor quickly discharged.

Driver's room

High -sides and low -side drives allow different types of power MOSFETs (also multiple MOSFETs to reduce RDSON) to maintain fast switch conversion. Low -end driverIt is provided by VCCDR, while high -end drives are provided by guidance pins. Prediction of death time control avoids the cross -conducting of MOSFET, and maintains a short range of 20 -nan seconds in a short dead area. Control the device monitoring node so that the diode of the low -side car bucket is re -circulated. If the voltage of the node is lower than that of a threshold (-350mv typical value), it will be reduced in the next PWM cycle within the dead area. It is predicted that the control zone control does not work when the high -side diode is turned on, because the node does not go. When this situation occurs, the converter is sinking current, for example, in this case, in this case, adapting to the control of the dead zone.

Monitoring and protection

The output voltage is monitored by pin FB. If the programming value is not, the power output is forced to be low. This device provides overvoltage protection: When the voltage reached on the FB pins is 20%(typical value), the voltage is 20%larger than the reference value, as long as the voltage is detected (see Figure 10).

It is necessary to consider the output terminal and FB pin, so the voltage on the pin is not the perfect replication of the output voltage. However, because the converter can absorb current, in most cases, the low side will be turned on before the output voltage exceeds the overvoltage threshold, because the error amplifier will lose balance in advance. Even if the device does not report over voltage behavior, it is the same, because the low side is opened immediately. The following figure shows the device behavior during the voltage event. The output voltage is increasing in an increased rate to simulate the disconnection of high -voltage MOSFET as overvoltage.

This device realizes overcurrent protection (OCP) on the high -voltage side to detect the current can set MOSFET (s), low -end MOSFET (s) and SO 2 current limit threshold threshold (See the OCH pin and OCL pin in Table 3. Point function):

Peak current limit

Valley current limit

Peak current protection on the high side MOSFET (S) When opening, the cover time is about 100ns. At the low side, the valley current protection enables MOSFET (s) to turn on the cover time of about 400ns. If, when the soft start -up phase is completed, enter the HICCUP mode at the connection time (peak current protection) or disconnecting time (valley current protection) device: high -voltage and low side MOSFET shutdown, soft startup capacitors at a constant value of 10 μA is 10 μA When the voltage at the SS pin reaches 0.5V, the soft start phase is restarted. In the soft start phase, OCP provides constant current protection. If the OCH comparator triggers the current high side MOSFET (s), the OCH comparator is turned off immediately (after the shielding time and internal delay) and returned to ON at the next PWM cycle. The limitations of this protection cannot be smaller than the shielding time plus the transmission delay. During the shielding time, the peak current protection is disabled. ifIt is very difficult to be short -circuited, even if there is such a short ton, the current will rise. Giveting current protection is very useful to limit the current in this case. If the OCL comparator triggers the current within the closing time, the high side MOSFET will not be turned on before the current exceeds the valley current limit. This means that if necessary, the pulse of some high -side MOSFETs will skip, and the maximum current is guaranteed according to the following formulas:

In the protection of constant current, the output value of the current control circuit limit error amplifier ( comp) to avoid its saturation, thereby restoring regulations faster when the output returns. Figure 12. The display device's behavior under over current conditions will continue during the soft start phase.

Heat Break

When the knot temperature reaches 150 ℃ ± 10 ℃, the device enters the heat shutdown state. Both MOSFETs are closed, and the soft startup capacitors are soft through internal switches. Until the knot temperature drops to 120 ° C, and in any case, the voltage of the soft starting pin reaches 500 millivolves.

Synchronous

There are multiple converters on the same circuit board to produce frequent noise. To avoid this situation, it is important to make them work at the same switch frequency. In addition, the phase shift between different modules of A helps to minimize the balance of the average root current on the public input. Figure 13 and 14 show the results of the two modules synchronization. Two or more devices can be synchronized by connecting synchronous pipes. The higher the equipment switching frequency, the higher the main switching frequency, the higher the main switching frequency, the higher the main switching frequency, the higher the switching frequency, the higher the main switching frequency, and the higher the main switching frequency. This is the controller to increase the switching frequency, reduce the amplitude of the slope proportion to increase the gain of the modulator.

In order to avoid the huge changes in the gain of the modulator, the best way is to synchronize the role of two or more devices is to make them work at the same switch frequency, and and and of. Under any circumstances, the frequency of switching is the same frequency of 50%of the minimum frequency. If, between two (or more) L6732 during the synchronization period, it is important to know which one is the owner in advance. This is the timely setting switch frequency at least 15%higher than the machine. Use the external clock signal (FEXT) to synchronize one or more devices (FSW) that work in different switching frequencies (FSW).

The minimum connection time (ton, division)

The device can manage the minimum connection time of less than 100ns. This function comes from the control topology of the special overcurrent protection system of L6732. In fact, in the voltage mode controller, there is no need to sensor current to execute the adjustment, and in the case of L6732, it is not suitable for over -current protection, but also considering that valley current protection during power off can run under any circumstances. andThe first advantage related to this function is the possibility of achieving extremely low conversion rate.Figure 15 shows that from 500kHz at 14V to 0.3V, and the ton is about 50ns.

Direction time is limited by the MOSFET switch time.