AD5231/AD5232/AD5233 are non-volatile memory digital potentiometers Price & Stock

2022-09-23 10:10:12

AD5231/AD5232/AD5233 are non-volatile memory digital potentiometers

feature

Nonvolatile memory presets hold wiper settings; AD5231 single, 1024 -bit resolution; AD5232 dual, 256 -bit resolution; AD5233 quad, 64-bit resolution; 10K, 50K , 100K ohm termination resistors; linear or log taper Setup; increment/decrement commands, push button commands; SPI-compatible serial data input with readback; +3 to +5V single-supply or ±2.5V dual-supply operation; user EEMEM nonvolatile memory for constant storage.

application

Replacement of mechanical potentiometer; instrument: gain, offset adjustment; programmable voltage and current conversion; programmable filter, delay, time constant; line impedance matching power supply adjustment dial; switch setting.

General Instructions

The AD5231/AD5232/AD5233 family offers -/dual/quad-channel, digitally controlled variable resistor (VR) with 1024/256/64-bit resolution, respectively. These devices perform the same electronic adjustment function as potentiometers or variable resistors. The AD523X is multifunctionally programmed with a microcontroller, allowing multiple modes of operation and adjustment.

In direct programming mode, the predetermined settings of the RDAC registers can be loaded directly from the microcontroller. Another mode of key operation allows the RDAC register to be refreshed with the settings previously stored in the EEMEM register. When a change is made to the RDAC register to establish a new wiper position, the setting value can be saved to EEMEM by performing an EEMEM save operation. Once the settings are saved in the EEMEM register, these values are automatically transferred to the RDAC register to set the wiper position when the system is powered up. This action is enabled by the internal preset strobe, which can also be accessed externally.

The basic mode of adjustment is the increment and decrement commands that control the current setting of the wiper position setting (RDAC) register. The internal wiper RDAC register can be moved up and down, which is one step above the nominal terminal resistance between terminals A and B. This will change the wiper to B-terminal resistance (RWB) linearly through one position segment of the device end-to-end resistance (RAB). For exponential/logarithmic changes in wiper settings, the left/right shift commands adjust volume in +/-6dB steps, which is useful for audible and light alarm applications.

The AD523X is available in a low profile TSSOP package. All parts are guaranteed to operate over the extended industrial temperature range of -40°C to +85°C.

Business Overview

The AD5231/32/33 family of digital potentiometers is designed as a true variable resistor replacement for analog signals that are held at VSS

Control of the digital potentiometer allows changes to be made to the Notepad register (RDAC register) and 100,000 nonvolatile electrically erasable memory (EEMEM) register operations. The EEMEM update process takes about 20.2ms, during which time the shift register is locked to prevent any changes. The RDY pin marks the completion of this EEMEM save. The retention period of EEMEM is designed for 15 years at 85°C, which is equivalent to 90 years at 55°C without refresh. The scratchpad registers can be changed incrementally by using software-controlled increment/decrement instructions or left/right shift instructions. Once an increment, decrement or shift instruction is loaded into the shift register, subsequent CS strobes will repeat the instruction. This is very useful for button control applications. Alternatively, the scratchpad registers can be programmed with any location value using the standard SPI serial interface mode by loading a representative data word. Under program control, the scratchpad register can be loaded with the current contents of the nonvolatile EEMEM register. When the system is powered on, the default value of the scratchpad memory is the value previously saved in the EEMEM register. The factory EEMEM preset is midscale. Under hardware control, the current contents of the non-volatile EEMEM register can be loaded into the scratch pad (wiper) register by pulsing the PR pin. Note that the PR pulse first sets the wiper to midscale (when set to logic zero), then on a positive transition to logic high it reloads the DAC wiper register with the contents of EEMEM. Similarly, the saved EEMEM value will be automatically retrieved to the scratchpad register during system power-up.

Serial data output pins can be used for daisy chaining and readout of internal register contents. The serial input data register uses 16-bit or 24-bit instruction/address/data words. Write protect (WP) disables any changes to the current contents of the scratchpad registers, regardless of the command, except that the EEMEM settings can be retrieved using commands 1 and 9.

Therefore, the Write Protect (WP) pin provides the hardware EEMEM protection feature.

Digital input/output configuration

All digital inputs are ESD protected high input impedance and can be driven directly from most digital sources. For PR and WP, they are active when logic low and can be tied directly to VDD if they are not being used.

The SDO and RDY pins are open-drain digital outputs, and pull-up resistors are only required when using these functions. Resistor values in the 1k to 10k ohm range optimize the balance of power and switching speed.

serial data interface

The AD523X family includes a four-wire SPI compatible digital interface (SDI, SDO, CS, and CLK). The main functions of this interface include:

• Independently programmable read and write for all registers;

• Refresh all RDAC wiper registers in parallel directly from the corresponding internal EEMEM registers;

• Increment and decrement instructions for each RDAC wiper register;

• Left and right shift bits of all RDAC wiper registers to achieve 6dB level change;

• Non-volatile storage of the current scratchpad RDAC register value into the corresponding EEMEM register;

• Additional bytes of user-addressable electrically erasable memory.

The serial interface includes three different word formats to support a single AD5231, dual AD5232, and four AD5233 digital potentiometer devices. The AD5232 and AD5233 use the 16-bit serial data word loaded MSB first, while the AD5231 uses the 24-bit serial word loaded MSB first. The format of the SPI compatible word is shown in Table 1 and Table 2. The command bit (Cx) controls the operation of the digital potentiometer according to the command commands shown in Tables 3, 4 and 5. The address bits (Ax) determine which register is activated. The data bits (Dx) are the values loaded into the decode register. The last instruction executed before no programming activity should be a no OPeration (NOP) instruction. This will keep the internal logic circuits in a state of minimum power consumption.

The equivalent serial data input and output logic is shown in Figure 2. Whenever the chip turns off the drain output SDO selects CS to be logic high. The SPI interface can be used in two slave modes CPHA=1, CPOL=1, CPHA=0, CPOL=0. CPHA and CPOL refer to control bits that indicate SPI timing in the following microprocessors/microconverters: ADuC812/824, M68HC11, and MC68HC16R1/916R1.

1.1.png

notes:

1. The SDO output shifts the last 16 bits of data out of the serial register for daisy-chaining. Exceptions:

Following instruction 9 or 10, the selected internal register data will appear in data bytes 0 and 1. Instructions after 9 must be a complete 24-bit data word to fully punch out the contents of the serial register.

2. The RDAC register is a volatile notepad register that is refreshed from the corresponding non-volatile EEMEM register at power-up.

3. Increment, decrement and shift commands ignore the contents of shift register data byte 0. Four. When the CS strobe returns to logic high, the action column recorded in the table is performed.

notes:

1. The SDO output shifts the last 8 bits of data into a serial register for daisy-chaining. Exceptions:

Following instruction 9 or 10, the selected internal register data will appear in data byte 0. Instructions after 9 must be a complete 16-bit data word to fully punch out the contents of the serial register.

2. The RDAC register is a volatile notepad register that is refreshed from the corresponding non-volatile EEMEM register at power-up.

3. Increment, decrement and shift commands ignore the contents of shift register data byte 0.

4. When the CS strobe returns to a logic high level, execute the operation column recorded in the table.

notes:

1. The SDO output shifts the last 8 bits of data into a serial register for daisy-chaining. Exception: Following instruction 9 or 10, the selected internal register data will appear in data byte 0. Instructions after 9 must be a complete 16-bit data word to fully punch out the contents of the serial register. The wiper has only 64 positions corresponding to the lower 6 bits of the register data.

2. The RDAC register is a volatile notepad register that is refreshed from the corresponding non-volatile EEMEM register at power-up.

3. Increment, decrement and shift commands ignore the contents of shift register data byte 0.

4. When the CS strobe returns to a logic high level, execute the operation column recorded in the table.

Latch digital output

A pair of digital outputs, O1 and O2, are available on the AD5231 and AD5233 parts, which provide a nonvolatile logic 0 or logic 1 setting. O1 and O2 are standard CMOS logic outputs as shown in Figure 2A. These outputs are ideal for replacing the functions normally provided by DIP switches. In addition, they can also be used to drive other standard CMOS logic control components that require occasional settings changes.

Use additional internal non-volatile EEMEM

The AD523x family of devices contain additional internal user memory registers (EEMEM) for holding constants and other 8-bit data. Table 6 provides the address map of the internal memory registers shown in the functional block diagram, such as EEMEM1, EEMEM2, ... EEMEMn and bytes of user EEMEM.

notes:

1. The RDAC data stored in the EEMEM location is transferred to its corresponding RDAC register on power-up or when Inst#1 and Inst#8 execute the following instructions.

2. The O1 and O2 data stored in the EEMEM location are transferred to their corresponding digital registers at power up or when Inst 1 and Inst 8 execute the following instructions.

3. User data is an internal non-volatile EEMEM register that can store and retrieve constants using Inst#3 and Inst#9, respectively.

4. The AD5231 EEMEM location is 2 bytes (16 bits) per data, while the AD5232 and AD5233 are 1 byte (8 bits) each.

Detailed programmable potentiometer operation

The actual structure of the RDAC is designed to simulate the performance of a mechanical potentiometer. The RDAC consists of a series of connected resistor segments, and a series of analog switches that act as wiper connections at several points along the resistor array. Points are the resolution of the device. For example, the AD5232 has 256 connection points and can provide a settable resolution better than 0.5%. Figure 3 provides an equivalent diagram of the connections between the three terminals that make up one channel of the RDAC. SW a and SWB will always be on, while one switch in SW(0) to SW(2N-1) will open one switch at a time based on the resistive step decoded from the data bits. Note that there are two 50 ohm wiper resistors, RW. The contribution resistance of RW must be considered in the output resistance. At the A-to-wiper terminal, RW is the sum of the SWA and SWX resistances. Similarly, RW is the sum of the resistances SWB and SWX at the B- to wiper terminals.