360 -degree look at the new generation of oscilloscopes] Series 5: Using FlexChannel to deal with multi-bus system debugging

Most embedded systems use multiple bus structures, and in order to observe these systems, debug and verification tools must be able to display the activity of multiple buses, as well as sensor, actuator, display, and interface signals. The challenge is not only to look at multiple buses, but each requires a different method of signaling and therefore a different method of probing. Some buses can be observed using single-ended measurements, others require differential measurements. To view multiple buses, you may want to take advantage of digital logic channels, greatly expanding the number of channels.

The new FlexChannel input channels allow the widest range of probes to be used to measure many different signals. Each FlexChannel can measure:
Use a passive probe to measure a single-ended analog signal Use the TLP058 logic probe to access 8 digital channels and measure 8 digital logic signals. Measure 1 differential voltage signal with a TekVPI® differential voltage probe. Measure 1 optically isolated differential voltage signal with IsoVuTM isolated measurement system Measure 1 current signal with TekVPI® current probes Input (using the TLP058 logic probe), or use both the analog and spectral views, each domain has independent acquisition controls that can be flexibly configured to suit your needs. To capture high-fidelity bus signals, there are several important factors to consider.

Acquire single-ended bus signals

Many common low- and medium-speed buses use single-ended signaling to represent digital signals at a specific voltage relative to system ground. These analog signals are typically captured using passive voltage probes that come standard with the oscilloscope or using the digital probes on a mixed-signal oscilloscope. FlexChannel inputs support both probe types, some important factors to consider include:
The ground wire should be as short as possible. To successfully acquire an analog signal, first ensure that the reference voltage of each channel is connected to the oscilloscope through a low-inductance path. Make sure that the rise time of the measurement system is less than one-fifth the rise time of the signal. The performance of the oscilloscope and probe must be able to represent the signal sufficiently and realistically. A common guideline is to ensure that the bandwidth of the measurement system is at least five times the signal bandwidth and that the sampling rate is at least 3-5 times the signal bandwidth. For digital logic circuits on the MSO, the combined system bandwidth of the oscilloscope and probe should be sufficient to capture the signal, and the sampling rate on the digital channels should be at least 10 times the signal frequency. Performance is usually expressed in bandwidth or the smallest pulse width that can be detected. Make sure the probe impedance is large relative to the signal source impedance to minimize the effect of probe loading on the signal. For low-power circuits, this is mainly the input resistance of the probe; for high-speed signals, this is mainly the input capacitance of the probe. Acquire differential bus signals

To improve the noise immunity of the bus, and to improve the signal integrity of the higher speed bus, differential signaling is often used. Unlike single-ended signaling, differential signaling is represented by the voltage difference between two signals. For some low frequency applications, a single-ended probe can be used to capture each side of a differential signal and the oscilloscope can calculate the mathematical difference. In practice, this technique is particularly prone to errors due to differences in probe gain, propagation delay, and compensation. The most reliable way to capture differential signals is to use an active differential probe, which uses a differential amplifier at the probe tip to sense voltage differences.
The performance considerations listed above for single-ended probes also apply to digital probes. However, it must be noted that differential probes can ignore or reject common-mode signals. A primary metric for these probes is the common-mode rejection ratio (CMRR) at the frequency of interest. Tektronix offers a wide variety of differential probes, including the optically isolated IsoVuTM differential measurement system designed for the most demanding measurement environments.

For all signaling methods - threshold is key

Regardless of the technique used to capture the signal, an analog representation of the bus signal is typically connected to an oscilloscope. Before the bus signal can be properly interpreted, the analog signal must be compared with a threshold, which is generally interpreted as high ("1") if it exceeds the threshold, and as ("0") if it is below the threshold. (In some cases, analog voltages are compared to thresholds inside the digital logic probe.)

Many embedded designs are based on multiple logic families, requiring the use of various digital thresholds. Some oscilloscopes support setting dedicated thresholds per channel for maximum debugging flexibility and acquisition fidelity.

Isolate Signal Integrity Issues Using Waveform Trigger Mode

When debugging signal integrity issues on a parallel or serial bus, you should first use the standard trigger modes in advanced oscilloscopes to capture signals that violate design specifications:
Pulse width triggering can be used to isolate glitches and minimum pulse width violations on clock and data lines. Timeout triggering can be used to isolate missed pulses, such as in a clock signal. You can use rise time and fall time triggering to isolate signal edges that are too fast or too slow in your design. Runt and window triggering can be used to isolate digital signals with incorrect amplitudes, too low, or too high. Multi-channel setup and hold triggering compares the timing of one or more data signals to a clock signal to detect component setup and hold violations. Embedded system design is becoming more and more complex, and more and more types of signals are integrated. Once any signal integrity issues are resolved, the next step is to verify that the wider system is working as expected. The new series of MSOs provide the ultimate tool for debugging and verifying multi-bus systems, featuring a large 15.6-inch high-definition display with twice the display area of a 10.4-inch display, and high-definition resolution that supports multiple signals and buses.