illustrate

The HDSP-253x is ideal for displaying dot matrix information of eight or more characters in an aesthetically pleasing way. These devices are 8-bit, 5x7 dot matrix, alphanumeric displays. 5.0 mm (0.2 in) tall characters are packaged in 0.300 in (7.62 mm) 30-pin dip. The onboard CMOS integrated circuit is capable of decoding 128 ASCII characters, which are permanently stored in ROM. Also, 16 program symbols may be storedinon boardRAM. Seven pairs of levels provide opposite functions in adjusting display intensity as well as power consumption. The HDSP-253x is designed for standard microprocessor interface technology special functions via bidirectional access to an eight-bit data bus.

feature

XY stackable 128-character ASCII decoder Programmable function 16 user-definable characters Multi-level dimming and blanking TTL compatible CMOS IC Solderable wave

application

Avionics

computer peripherals

Industrial Instrumentation

medical equipment

Portable Data Entry Devices

telecommunications

Test Equipment

notes:

1. Maximum voltage without LED lighting.

2.20 points at full brightness at all locations.

3. See the Thermal Considerations section Environment for information on high temperature operation.

notes:

1. Refers to the initial case temperature of the device before measurement.

2. The dominant wavelength ld is derived from the CIE chromaticity diagram and represents a single wavelength that defines the color of the device.

AC timing characteristics over temperature VDD = 4.5 to 5.5 V unless otherwise specified.

notes:

1. Worst case value occurs at an IC junction temperature of 125°C.

2. For designers who do not need to read from the display, the read line can be tied to VDD and the write and chip enable lines can be tied together.

3. Changing the logic level of the address line when CE = "0" may cause incorrect data to be entered into the character RAM regardless of the logic level of the WR and RD lines.

4. The display cannot be accessed until 3 clock pulses (using the internal refresh clock, 110 microseconds minimum) after the rising edge of the reset line.

Input pulse level: 0.6 V to 2.4 V

Output reference level: 0.6 V to 2.2 V

Output load = 1 TTL load and 100 pF

Electrical Instructions

Pin Function Description Reset (RST, pin 1) resets the initialization display. FLASH (FL, pin 2) FL low means accessing FLASH RAM, not affected by the address state. Each location in the address input memory has a different address. The address input (A0-A2) selects a specific (A0-A4, pins 3-6, 10) character RAM, flash RAM or UDC (User Defined Character) RAM for a specific row location. A3-A4 are used to select the portion of memory to be accessed. Table 1 shows the logic levels required to access each section of memory

Clock Select (CLS, Pin 11) This input is used to select the internal (CLS=1) or external (CLS=0) clock source. Clock In/Out Output master clock (CLS=1) or input clock (CLS=0) for slave display. (CLK, pin 12) WRITE (WR, pin 13) Data is written to the display when the WR input is low and the CE input is low. Chip Enable (CE, Pin 14) This input must be logic low to read or write data to the display and must go high between each read and write cycle. When the RD input is low and the CE input is low, the read (RD, pin 19) data is read from the display. Data Bus The data bus is used to read or write to the display. (D0-D7, pins 20, 21, 25-30) Ground (Power) (Pin 16) This is the analog ground for the LED driver. GND (Logic) (Pin 18) This is the digital ground for the internal logic. VDD (Power) (Pin 15) This is the positive power supply input. Thermal Test (Pin 17) This pin is used to measure the IC junction temperature. Do not connect.

show internal block diagram

Figure 1 shows the internal block diagram of the HDSP - 253x display. CMOS integrated circuit consists of an 8-byte character RAM, 8-bit flash RAM, 128-character ASCII decoder, a16-character UDC RAM, a UDC address register, a control synchronization 8 5 x 7 points required for decoding and driving word registers and refresh circuit matrix characters. The primary user-accessible section of the is shown below:

Character Ram Figure 2 shows the logic level required to access HDSP - 253X character memory. During normal access, CE="0" or RD="0" or WR="0". However, erroneous data if the address line is not stable when CE="0", regardless of the RD or WR line. Address lines A0-A2 are used to select locations in character memory. Two types of data can be stored in each character's RAM location: ASCII code or UDC RAM address. Data bit D7 is used to distinguish between ASCII characters and UDC RAM addresses. D7=0 enables ASCII decoder, D7=1 enables UDC memory. D0-D6 are used to input ASCII data and D0-D3 are used to input UDC addresses.

UDC RAM and UDC Address Registers Figure 3 shows the logic level RAM and UDC address registers required to access the UDC. The UDC address register is 8 bits wide. The lower four bits (D0-D3) are used to select one of the 16 UDC positions. The top four unused bits (D4-D7). The UDC RAM can be accessed once the UDC address is stored in the UDC address register. To fully specify a 5 x 7 character requires eight write cycles. One cycle is used to store the UDC RAM address to the UDC address register. Seven cycles are used to store point data in UDC RAM. Data is entered in rows. A loop is required to access each row. Figure 4 shows the organization of UDC characters, assuming the symbol is stored as an "F". A0-A2 are used to select the row accessed to be stored and D0-D4 are used to transmit row point data. The upper three digits (D5-D7) are ignored. D0 (the least sign bit) corresponds to the rightmost column of the 5 x 7 matrix and D4 (the most significant bit) corresponds to the most columns of the left 5 x 7 matrix. Flash Figure 5 shows the logic level slamming required to access Flash. Flash RAM has one RAM location for each character. Use the flash input to select flash. Address lines A3-A4 are ignored. Address lines A0-A2 are used to select flash storage attributes. D0 is used to store or remove flash attributes. D0="1" store attribute D0="0" delete attribute. When the attribute is enabled via bit 3 of the control word and "1" are stored in flash, the corresponding character will flash at approximately 2 Hz. The actual rate depends on the clock frequency. For an external clock the flash rate can be calculated by dividing the clock by 28672.

control word register

Figure 6 shows how to access the control word register. This is an eight-bit register that performs five functions. They are Brightness Control, Flash Control, Blink, Self Test and Clear. Each function is independent of the others. How to update all bit word write loops during each control. Brightness (bits 0-2) Adjusts the display for bits 0-2 of the control word. Bits 0-2 are interpreted as a three-bit binary code code (000) corresponding to maximum brightness and a code (111) corresponding to a blank display. In addition to changing the display brightness, bits 0-2 also change the average value of IDD. IDD can be calculated for any brightness level by multiplying the brightness level percentage by the IDD value at 100% brightness level. These values of IDD are shown in Table 2. Flash function (bit 3) Bit 3 determines whether the flash character attribute is turned on or off. When bit 3 is "1", the output of the flash memory has been checked. If there is a "1" somewhere in the flash memory, the associated number will flash at about 2 Hz. For an external clock, the blink rate can be determined by dividing the clock frequency by 28672. If the bit of the flash enable control word is "0", the contents of the flash RAM are ignored. To use this function when displaying multiple times, see the reset section. Bit 4 of the blink function (bit 4) control word is used to synchronously blink the eight digits of the display. When this bit is "1" all 8 numbers on the display will blink at about 2 Hz. This actual rate depends on the clock frequency. For an external clock, the blink rate can be divided by 28672 by the clock frequency. This function will override the flash function at startup. Use this feature for multiple display systems, see the reset section

Self-test function (bits 5, 6)

Bit 6 of the control word register is used to start the self test function. The internal self-test result is stored in bit 5 of the control word. Bit 5 is a read-only bit, where bit 5=“1” means that the self-test has passed, and bit 5=”0” means that the self-test has failed. Setting bit 6 to logic 1 will initiate the self-test function. The built-in self-check function of the IC includes the internal roulette movement of the main part of the IC and all LEDs for illumination. The first regular cycle ASCII decoder ROM performs a checksum on the output through all states. If the checksum matches the correct value, bit 5 is "1". The second rou tine provides visual testing of the LEDs using the driver circuit. This is the displayed pattern done by writing squares and inverse squares. Each pattern is displayed for about 2 seconds. During the self-test function, the monitor has to be accessed. The time required to perform the self-test is multiplied by 262144 in clock cycles. For example, assuming a clock frequency of 58 KHz, the time to perform the self-check function frequency is equal to (262144/58000) = 4.5 seconds duration. At the end of the self-test function, the character RAM is loaded blank, the control word register is set to zero except bit 5, the flash memory is cleared, and the UDC address register is set to all. The clear function (bit 7), bit 7 of the control word will clear the character RAM as well as the flash memory. Setting bit 7 to '1' will initiate the clear function. Three clock cycles (using an internal refresh clock) are required to complete the clear function. When clearing is displayed. When the clear function completes, bit 7 will be reset to "0". The code for the ASCII character space (20H) will be loaded into character RAM to blank the display, and loaded into flash RAM for "1", re-maintenance of UDC RAM, UDC address register and control word is not affected. Display Reset Figure 7 shows the logic levels required to reset the display.

The display should reset on power up. External reset clears character RAM, flash RAM, control word resets internal counters. After the rising edge of the reset signal, it takes three clock cycles (using the clock that requires an internal refresh) to complete the reset sequence. Displays when resetting is in progress. The ASCII character code (20H) of the space will be loaded into the character RAM for a blank display. Flash and control word registers are loaded with all "0"s. UDC RAM and UDC address registers are not affected. The same clock source for all operating displays must be reset simultaneously to sync blink and blink functions. Mechanical Considerations The HDSP-253X is assembled by die attach and wire combining 280 LED chips and CMOS integrated circuits with a thermally conductive printed circuit board. The polycarbonate lens is on the PCB, creating an air gap over the LED wire bond. A backfilled epoxy seals the display package. Figure 8 shows the correct way to insert the display by hand. To prevent damage to the LED wire connections, use your fingers to press that part evenly. Using a tool such as a screwdriver or pliers as shown in Figure 9 to push the monitor into the PCB or socket may damage the LED wire connections. The force applied by this screwdriver goes into the LED wire connections. A bent wire connection can cause a short or open, causing the LED to fail catastrophically.

Thermal factor

The HDSP-253X can operate at temperatures from -40°C to +85°C. The display's low thermal resistance allows heat to escape from the CMOS IC's 24 package pins. Typically, this high temperature is free air traced through the printed circuit board. For most applications, no additional cooling is necessary. Simultaneous lighting of all 280 LEDs at full speed brightness is not recommended for continuous operation. However, all 280 LEDs can be lit simultaneously at 25°C at full brightness for 10 seconds as a lamp test. The maximum allowable junction temperature of the integrated circuit is 150°C. The IC junction temperature can be obtained by the following equation: TJMAX = TA + (PD x RqJ-A) TJMAX is the maximum allowable IC junction temperature. TA is the ambient temperature around the display. PD is the power consumed by the integrated circuit. RqJ-A is the environment for integrated circuits through display packaging and printed circuit boards. A typical value for RqJ-A is 39°C/W. This value is typically used for a display filter that is mounted on a socket and covered with plastic. The sockets are soldered to 0.062 inches. Thick printed 0.020 inch boards. Wide one ounce copper trail. The calculation method of partial discharge is as follows: PD=VDD×IDDVDD is the power supply voltage, and IDD is the power supply current. VDD can vary from 4.5 volts to 5.5 volts. IDD varies with VDD, temperature, brightness level, and number of pixels. For Algars IDD(35;) = (83.8 x VDD-0.35 x TJ) x B x N/8 IDD(V) = (63 x VDD-0.79 x TJ) x B x N/8 IDDs for other colors (35 ;) = (75.4 x VDD-0.28 x TJ) x B x N/8IDD(V) = (54 x VDD-0.6 x TJ) x B x N/8IDD(#) is the supply current shown using "#" . IDD(V) is the supply current character shown as "V". TJ is the junction temperature of the integrated circuit. B is the percentage of brightness level. N is the number of characters illuminated.

Operation in high temperature environments may require power derating or heat dissipation. Figure 10 shows how to reduce the power of the HDSP-253X. You can lower the supply brightness level through tighter supply voltage regulation or lower.

Table 3 shows the calculated maximum allowable ambient temperature for several sets of different operating conditions. The worst alphanumeric characters (#, @, B) have 20 pixels. Displaying 8 20px characters will not happen in normal operation. Therefore, using eight 20-pixel calculations for power dissipation willover estimate the characteristic power and IC junction temperature. Average the number of pixels per character, the supply voltage, the brightness level, and the number of characters needed to calculate the power consumption of the IC. The ambient temperature, power dissipation and thermal resistance of the integrated circuit are then used to calculate the integrated circuit junction temperature. This typical alphanumeric character is 15 pixels. Conditions not listed in Table 3, you can calculate the power dissipation of the IC and use Figure 10 to determine the maximum ambient temperature.

The actual IC temperature is easy to measure. Pin 17 is thermally and electrically connected to the IC substrate. 16°C/W from pin 17 to IC. The steps to measure IC junction temperature are as follows:

1. Measure the VDD and IDD of the display. Measure VDD between pins 15 and 16. Measure the current into pin 15.

The temperature of pin 17 was measured after 2.45 minutes. Use electrically isolated thermocouple probes.

3. TJ(IC)=Tpin+VDD x IDD x 16°C/W.

ground connection

Two ground pins are provided to keep the internal IC logic ground clean. If necessary, the designer can ground the LED driver with logic until a suitable ground plane is available. For long connections between the display and the host system, designers can isolate the two grounds by keeping the voltage drop on the analog ground affecting the display logic. The logic base should be connected to the same base logic interface circuit. Analog ground and logic ground should be connected to an LED driver capable of withstanding switching. When used with separate grounds, the analog ground can vary from -0.3V to +0.3V with respect to the logic base. A voltage below -0.3V can make all the dots on it. Voltages higher than +0.3V will result in dim and dot mismatch. Solder and Post Solder Cleaning NOTE: Freon vapors can cause black paint to peel off the monitor. For information, see Application Note 1027 Soldering and Post-Weld Cleaning. Contrast Enhancement (Filtering) See Application Note 1015 Enhancement for information on contrast.