1. Features

2A integrated door drive

Full differential current reading

Crossive sensor or low -voltage side

MOSFET

]

Integrated temperature sensor

Constant overcurrent protection

[

123] The internal fixation of the oscillator is fixed in

150kHz (450kHz ripple)

External adjustable oscillator

Output enable

Integrated remote sensor

TQFP48 7X7 packaging, with exposed pads

2. Application

Power -type large current VRM/VRD/server/workstation CPU

DC/high density Converter

3. Explanation

This device realizes the phase compact 7x7mm body component of the integrated large current driver between the three -phase antihypertensive controller in the three -phase antihypertensive controller. Essence Device embedded DAC: output voltage range is 0.8185V to 1.5810V12.5MV step (video selection u003d open) or 0.800V to 1.550V, 25 millivoltors (vid_sel u003d gnd; VID5 drive optional+25mv can be available Dynamic) Manage dynamic videos, online and temperature accuracy of 0.5%. The additional programming offset can be added to the voltage benchmark with an external resistor. This device guarantees the rapid protection of the current and overload/under pressure of the load. Provide an internal crowbar, rotate MOSFET on the lower side, if the voltage is detected. If a current occurs, the system will work in the constant current mode until UVP. The optional current reading increases the flexibility of system design.

Electric characteristics

(VCC u003d 12V ± 15%, TJ u003d 0 ° C to 70 ° C, unless there are other regulations) [ 123]

Device description

This device is a three-phase PWM controller and an embedded large current drive, which provides a complete high-performance antihypertensive DC-DC voltage regulator's control logic and protection to optimize the advanced microprocessor power supply. Multi -phase buck is the simplest and most economical topological structure that can meet the increasing current demand DC/DC converters and POL of new microprocessors and modern large current. It allows to use smaller, cheaper, and the most common external power MOSFET and inductors. In addition, the number of input and output capacitors is reduced due to the phase shift between 120 ° per phase. In fact, in fact, interlacing leads to a decrease in the voltage of the input average root current and output ripples, and the frequency of effective output switches increases: the free operation frequency of 150kHz per phase, the external can be adjusted through a resistor. The result of the output is the original three three. Note. The controller includes multiple DACs, which can be selected through a suitable pink (VID_SEL), allowing compatibility with VRD 10.x and Hammer, or a D-VID conversion accordingly. This can be accurately selected for the output voltage, programming the VID and VID_SEL pins, from 0.8185V to 1.5810V, 12.5MV two advances (VRD 10.X compatibility mode-6 digits of programming-19MV bias during the production process), Or 0.800V to 1.550V, 25 MV steps (VRM hammer compatibility mode-5 bits, VID5 programming 25 millival positive offset (in this case), the maximum tolerance of the output adjustment voltage is ± 0.5%(the hammer is the hammer is the hammer is the hammer is the hit is ± 0.6%), exceeding temperature and wire voltage changes. The device allows only the required method to select the method of the full differential mode through the electrical sensor or the low -side MOSFET. It can also be considered a sensing resistance on the related elements to improve the accuracy of reading. Reading current information correction PWM output to balance the average current of each phase. Unless considering the expansion of the sensing element. This device provides a programmable overvoltage protection to protect the load from hazardous overvoltage stress. It can be set to a fixed voltage through an appropriate resistance. The lower driver and drive the high failure immediately lock the needle. In addition, the preliminary OVP protection also allows the equipment protection load to be free of danger. OVP is not higher than the UVLO threshold. , Make the device into the constant current mode until the UVP is locked. According to the selected reading mode, the device maintains the peak (inductance induction) or valley value (LS sensing) of the electrical current ripple. The high level of the fault pins will be driven: recovery it is enough to circulateVCC or external needle. Compact 7x7mm body TQFP48 packaging, with exposed heat sink pads, can disperse driving power external MOSFET through the system board.

The current reading and the balance control circuit

The device is embedded in a flexible, full differential category of current sensing circuit, which can read two low -side or inductors parasitic resistance, or connect through series connecting series The sensing resistance on this component. The reading of the full differential current can inhibit the noise and allow the sensor element to be placed in different positions without affecting the measurement accuracy. You can use CS_SEL pin: Set the freedom of the pin, use LS MOSFET, and short the circuit to SGND at the same time, the use of the inductor opposite. The detailed information about the connection is shown in Figure 6. The high bandwidth -wide flow control circuit allows the current balance, even during the load transient period: a current base is established, which is equivalent to reading the average of the current (IAVG), and the reading voltage is transformed into a proper. The voltage of gain is used to adjust the cycle of the dominant value of the duty cycle from the voltage error.

Low -voltage side current reading

Keep the CS_SEL pins open, pass the voltage reduction of the current low -side MOSFET per phase of each phase MOSFET through one in its series connect Sensing resistance and transforming into current. The cross-guidance ratio from the outer resistor RG placed outside the chip emits CSX-and CSX+needle direction to read points (see Figure 7 on the right). The proprietary current detection circuit tracking the current information for a period of time ttrack u003d TSW/3 (TSW u003d 1/FSW), concentrated in the middle of the low -side MOSFET conduction time (close time, see Figure 7 on the left), and at the remaining time.该设备从CSx+引脚提供恒定的50μa电流：电流读取电路使用该引脚作为参考和反应保持CSx引脚在读取时间内的电压（内部钳位保持CSx+和CSx-在相同的电压下从CSX-pin sinks the necessary current maintenance time; when the LS-MOSFET-RDSON detection is implemented to avoid the absolute maximum value, it is necessary to maintain the time to overcome the rated value on the CSX-pin). The current flowing out from the CSX pin is given by the following formula (see Figure 7- right):

RDSON is the pitch resistance of the low-side MOSFET, RG is between it is between The cross-conductor CSX-and CSX+pins used facing the reading point; iPhosex is a relative phase and iinfox is the current information signal replicated. 50 μA offset allows negative current reading to enable the device to check the risk return current to ensure that the current is completely balanced. From the perspective of the current information, the total current information provided (IDROOP u003d IInfo1+Iinfo2+Iinfo3) is available.3). IINFOX and IAVG are then compared to give corrections to the output of PWMX to balance the current carried by the three phases.

The current reading of the inductor

Put the short circuit of the CS_SEL foot to SGND, and use the voltage degradation to read the current passing through the output induction or sensor. The resistance (RSENSE) is connected in series and converted into a current internally. CSX-and CSX+needle are issued by the external resistor RG placed on the outside of the chip (see Figure 6 on the right). The current detection circuit is always tracking the detected current, and it still provides a constant 50 μA current CSX+pin: This pin is used as a reference to keeping the CSX pin voltage. Correctly copy the inductive current R-C filter network must be parallel with the sensing element. Then, the current flowing out from the CSX pin is given by the following formula (see Figure 8)

Among them, iPhaseX is a relatively carried current.

The time constant between the matching of the matching sensor and the R-C filter of the app is now considered (time constant without matching will lead to the introduction of the pole in the current reading network, which will cause unstable. And it is also important to make the system display resistance equivalent output impedance. The result is:

Among them, iinfo is the current information replicated. 50 μA offset allows negative current readings to make the number of negative current, so that The device can check the risk -to -return current to ensure that the current is completely balanced. From the current information, obtain the relevant current (IDROOP u003d IInfo1+IInfo2+IINFO3) and the average current of each stage (IAVG u003d (IInfo1+ Information about info2+iinfo3)/3). Then compare iinfox with IAVG to get correction of PWM output so that the current of the three -phase is equal. Since the design of the RG design considers OC protection, it is to further improve the flexibility of the system design. The resistor connected to CSX+can be divided into two resistors, as shown in Figure 8.

VID tube foot is the input of the internal DAC. By providing a series of resistors in the partition, the internal reference voltage is achieved. VID code drives the multi -way reused device. The point of the device at the separation line. The DAC output is transmitted to the amplifier that obtains the reference voltage (that is, the setting point error)., Typical value is 3V); in this way, when the programming logic ""1"