feature 35mW maximum power consumption; slim 50W power-down mode; slim maximum 25s acquisition and conversion; maximum 1.5LSB entry; dnl: 16 bits, no missing codes; minimum SNR with 1kHz input is 86dB; ± 10V , 0V to +5V and 0V to +4V input range; single +5V supply operation; parallel serial data output; pin compatible with 12-bit ADS7806 ; use internal or external references; 0...
Read moreFeatures: Ultra Low Power 150mA 150mV Voltage Drop 150mA 25µA Ground Current Enable/Disable Control SOT33-5 Package Thermal Limit 300mA Peak Current Applications: Cell Phones and Accessories Camcorders and Video Recorders Notebooks, Notebooks and Palmtops Description: The fan2502/03 series of micro-power low-dropout voltage regulators using CMOS technology ...
Read morefeature: Low power CMOS technology: maximum write current 5 mA 5.5V5.5V maximum read current 500 μA - Standby current 100mA , typ. 5.5V 2-wire serial interface bus, I2C™ compatible Cascadable up to four devices Automatically timed erase/write cycle Provides 128-byte page write mode Up to 5 ms write cycle time Hardware write-protected output ramp control for entire array , elim...
Read moreFeatures: Single 4th-order 8 MHz (SD) filter drives single AC or DC coupled video load (2 vpp, 150 Ω) Drives dual AC or DC coupled video loads (2 vpp, 75 Ω) Transparent input clamps AC or DC coupled input AC or DC Coupled Output DC Coupled Output Eliminates AC Coupling Capacitors Single Supply Robust 8 kV ESD Protection Lead Free Package: SOIC-8 ...
Read morefeature 5 ns end-to-end logic delay system frequency up to 178 MHz 72 macrocells, 1600 usable gates in small package - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100-pin TQFP (72 user I/O pins) Optimized for high performance 3.3V systems - low power operation -5V tolerant I/O...
Read moreFeatures Used to configure Cylinx Gas Low Power Advanced CMOS NOR Flash Process Lasts 20,000 Program/Erase Cycles Operates Over Industrial Temperature Range (-40°C to +85°C) IEEE Std 1149.1 /1532 Boundary Scan (JTAG) support for programming, prototyping and testing The jtag command for standard fpga enables cascading storage of longer or multiple bit stream...
Read more256kbit (32k×8) serial (spi) f-ram Features: 64 kbit/256 kbit Ferroelectric Random Access Memory (F-RAM) 10064 ; logically organized as 8K×8 ( FM3164 )/32K×8 (FM31256) high endurance 100 trillion (1014) read/write 151 years Data retention period (see data retention and endurance table) nodelay 8482 ; written in advanced high reliability ferroelectric process high integration dev...
Read morefeature Replaces ADC574 , ADC674 and ADC774; for new designs; complete sampling A/D; reference, clock and; microprocessor interface; fast acquisition and conversion: 8.5 microseconds maximum temperature; eliminates external sample/hold; in most applications Medium; Guaranteed AC and DC performance; Single supply +5V operation; Low power: 120MW max; Packaging options: 0.6" a...
Read moreFeatures: Logically 2-mbit Ferroelectric Random Access Memory (f-ram) organized as 128k x 16 256 K x 8 configured using UB and LB High Endurance 100 Trillion (1014) Read/Write 151 Year Data Retention (See Data Retention and Endurance table) nodelay 8482 ; write page mode operation to 30 ns cycle time Advanced high reliability ferroelectric process SRAM compatible with i...
Read morefeature All-in-one synchronous buck driver; bootstrap high-side driver; one PWM signal generates two drivers; programmable transition delay; anti-cross-conduction protection circuit. application Multiphase desktop CPU power supplies; mobile computing CPU core power converters; single-supply synchronous buck converters; standard to synchronous converter adaptations. General Instruction...
Read moreModule Features, Architecture Overview, Array Size and Resources, Functional Description DS099 (v3.1) Input/Output Block (IOB), IOB Overview, SelectIO Interface I/O Standard, Configurable Logic Block (CLB) Block RAM, Dedicated Multiply Controller, Digital Clock Manager (DCM) Clock Network, Configuration Module 3: DC and Switching Characteristi...
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